Fifo with word line match circuits for flag generation

Details Fifo with word line match circuits for flag generation Fifo with word line match circuits for flag generation

1993-02-10

1994-09-06

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Simultaneous operations

365221, 365219, 365222, 36518907, G11C 800

Patent

active

053454197

ABSTRACT:
A first in, first out memory (FIFO) includes a multi-port memory array, which is accessed for read/write operations by activating a selected read or write word line. The read word line is controlled by a read shift register, and the write word line is controlled by a write shift register. In order to generate "full" and "empty" flags, the voltage state of read and write word lines are determined in "match circuits", which compare the locations of the read and write pointers. This eliminates the use of counters, and allows the shift registers and word line match circuits to be an integral part of a single-block regular structure. Furthermore, it allows the FIFO to be readily expanded to multiple numbers of words and bits per word.

REFERENCES:
patent: 4535427 (1985-08-01), Jiang
patent: 4694426 (1987-09-01), Mason
patent: 4875196 (1989-10-01), Spaderna et al.
patent: 5027330 (1991-06-01), Miller
patent: 5228002 (1993-07-01), Huang

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