FIFO memory with single port memory modules for allowing...

Details FIFO memory with single port memory modules for allowing... FIFO memory with single port memory modules for allowing...

2007-02-20

2007-02-20

Shah, Sanjiv (Department: 2185)

Electrical computers and digital processing systems: memory

Addressing combined with specific memory configuration or...

For multiple memory modules

C711S150000, C711S167000, C711S168000, C711S169000

Reexamination Certificate

active

10692664

ABSTRACT:
The present invention is directed to a FIFO memory with single port memory modules that may allow simultaneous read and write operations. In an exemplary aspect of the present invention, a method for employing a FIFO memory with single port memory modules of half capacity to perform simultaneous read and write operations includes the following steps: (a) providing a first single port memory module for an even address of a read or write operation; (b) providing a second single port memory module for an odd address of a read or write operation; (c) alternating even address and odd address; and (d) when both a read request and a write request reach either the first single port memory module or the second single port memory module at a clock cycle, fulfilling the read request at the current clock cycle and fulfilling the write request at the next clock cycle.

REFERENCES:
patent: 5084841 (1992-01-01), Williams et al.
patent: 5086346 (1992-02-01), Fujisawa
patent: 5471583 (1995-11-01), Au et al.
patent: 5663910 (1997-09-01), Ko et al.
patent: 5974482 (1999-10-01), Gerhart
patent: 2003/0034797 (2003-02-01), Bentz
Microsoft Computer Dictionary, Copyright 1999, Microsoft Press, Fourth Edition, pp. 159, 372, 423.

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