Field programmable gate array incorporating dedicated memory...

Electronic digital logic circuitry – Multifunctional or programmable – Array

Reexamination Certificate

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C326S040000

Reexamination Certificate

active

11037490

ABSTRACT:
A field programmable gate array, an access lead network coupled to the FPGA, and a plurality of memories electrically coupled to the access lead network. The FPGA, access lead network, and plurality of memories are arranged and configured to operate with a variable word width, namely with a word width between 1 and a maximum number of bits. The absolute maximum word width may be as large as m.times.N where m is the number of word width bits per memory chip and N is the number of memory chips.

REFERENCES:
patent: 6526559 (2003-02-01), Schiefele et al.
patent: 6856167 (2005-02-01), Ozguz et al.

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