Field programmable gate array having access to orthogonal and di

Details Field programmable gate array having access to orthogonal and di Field programmable gate array having access to orthogonal and di

1997-09-24

2000-01-11

Teska, Kevin J.

39550018, G06F 9455

Patent

active

060145099

ABSTRACT:
A field programmable gate array (FPGA) comprising a matrix of programmable logic cells, a bus network of local and express bus lines, and a system of perimeter I/O pads is disclosed. Logic cells are directly connected to neighboring nearest cells, including diagonally and orthogonally adjacent cells, and are also connected to local bus lines. Such direct cell-to-cell connections allow both directions of signal propagation. I/O pads connect to cells at the perimeter of the matrix and to the bus network. Preferably, I/O pads are connectable to more than one cell and more than one row or column of bus lines, and each perimeter cell can be connected to any of several I/O pads.

REFERENCES:
patent: Re34363 (1993-08-01), Freeman
patent: 4700187 (1987-10-01), Furtek
patent: 4706216 (1987-11-01), Carter
patent: 4758985 (1988-07-01), Carter
patent: 4873459 (1989-10-01), El Gamal et al.
patent: 4918440 (1990-04-01), Furtek
patent: 4935734 (1990-06-01), Austin
patent: 5019736 (1991-05-01), Furtek
patent: 5144166 (1992-09-01), Camarota et al.
patent: 5185706 (1993-02-01), Agrawal et al.
patent: 5204556 (1993-04-01), Shankar
patent: 5208491 (1993-05-01), Ebeling et al.
patent: 5224056 (1993-06-01), Chene et al.
patent: 5231588 (1993-07-01), Agrawal et al.
patent: 5253363 (1993-10-01), Hyman
patent: 5254886 (1993-10-01), El-Ayat et al.
patent: 5258668 (1993-11-01), Cliff et al.
patent: 5260610 (1993-11-01), Pedersen et al.
patent: 5260881 (1993-11-01), Agrawal et al.
patent: 5295090 (1994-03-01), Hsieh et al.
patent: 5296759 (1994-03-01), Sutherland et al.
patent: 5302865 (1994-04-01), Steele et al.
patent: 5311080 (1994-05-01), Britton et al.
patent: 5313119 (1994-05-01), Cooke et al.
patent: 5317698 (1994-05-01), Chan
patent: 5336950 (1994-08-01), Popli et al.
patent: 5343406 (1994-08-01), Freeman et al.
patent: 5349250 (1994-09-01), New
patent: 5352940 (1994-10-01), Watson
patent: 5359536 (1994-10-01), Agrawal et al.
patent: 5365125 (1994-11-01), Goetting et al.
patent: 5367209 (1994-11-01), Hauck et al.
patent: 5377123 (1994-12-01), Hyman
patent: 5386154 (1995-01-01), Goetting et al.
patent: 5386156 (1995-01-01), Britton et al.
patent: 5408434 (1995-04-01), Stansfield
patent: 5414377 (1995-05-01), Freidin
patent: 5424589 (1995-06-01), Dobbelaere et al.
patent: 5425036 (1995-06-01), Liu et al.
patent: 5426379 (1995-06-01), Trimberger
patent: 5432719 (1995-07-01), Freeman et al.
patent: 5442306 (1995-08-01), Woo
patent: 5455525 (1995-10-01), Ho et al.
patent: 5457409 (1995-10-01), Agrawal et al.
patent: 5537057 (1996-07-01), Leong et al.
patent: 5598109 (1997-01-01), Leong et al.
patent: 5671432 (1997-09-01), Bertolet et al.
Renovell et al., Test of RAM-Based FPGA: Methodology and Application to the Interconnection, Jan. 1997, pp. 230-237.
Perkowski, Tenary and Quarternary Lattice Diagrams for Linearly-Independent Logic, Multiple-Valued Logic, and Anaolog Synthesis, Sep. 1997, pp. 1-5.
Xilinx, XC3000, XC3000A, XC3000L, XC3100, XC3100A Logic Cell Array Families, FPGA Product Description and Specifications, pp. 105-195.
Keiichi Kawana et al., "An Efficient Logic Block Interconnect Architecture for User-Programmable Gate Array", Proceedings of the IEEE 1990 Custom Integrated Circuits Conference, cat. no. 90CH2860-5, pp. 31.3.1-31.3.4 (May 1990).
Atmel, Field Programmable Gate Arrays, AT6000 Series, pp. 1-20.
Altera, Field 800 Programmable Logic Device Device Family, Data Sheet, Mar. 1996, ver. 6, pp. 37-56.
Altera, FLEX 10K Embedded Programmable Logic Family, Data Sheet, Jul. 1995, ver. 1, pp. 1-54.
Xilinx, XC4000 Series Field Programable Gate Arrays, Advanced Procduct Information, Feb. 2, 1996, (Version 0.91), pp. 1-112.
Xilinx, XC5200 Logic Cell Array Family, Preliminary Product Description, Oct. 1995 (Version 3.0), pp. 1-30.
Xilinx, A Technical Overview For the First-Time User, FPGA Product Description and Specifications, pp. 2-1 to 2-103.

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