Field programmable gate array

Electronic digital logic circuitry – Multifunctional or programmable – Array

Reexamination Certificate

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Details

C326S038000, C326S041000

Reexamination Certificate

active

06876228

ABSTRACT:
It is one object of the present invention to provide an FPGA for which the configuration time and the time required for rewriting connection information and logic structure information can be reduced, and for which the size of the area occupied can also be reduced. In order to store connection information for an FPGA, magnetic storage elements MTJ1to MTJn, which are memory cells of an MRAM, are provided, and using a shift register71, connection information is written to the magnetic storage elements MTJ1to MTJn. The shift register71includes register elements SR1to SRn, which correspond to the magnetic storage elements MTJ1to MTJn, to which the connection information is serially input and stored. When the power is switched on, the connection information stored in the magnetic storage elements MTJ1to MTJn is latched by latch elements LT1to LTn, and is output to switching circuits6to interconnect logic blocks51.

REFERENCES:
patent: 5541529 (1996-07-01), Mashiko et al.
patent: 6326651 (2001-12-01), Manabe
patent: 6542000 (2003-04-01), Black et al.

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