Field programmable analogue processor

Details Field programmable analogue processor Field programmable analogue processor

1999-05-06

2002-07-02

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

06415429

ABSTRACT:

BACKGROUND
1. Field of the Invention
This invention relates to a field-programmable analogue processor.
2. Related Art
There are many situations in which analogue signal, processing can offer significant advantages over digital signal processing. For example, digital processing of signals conventionally requires the steps of sampling signal, analogue-to-digital conversion, digital processing, and digital-to-analogue conversion. In contrast, analogue signal processing allows a signal to be processed directly, thus providing a considerable saving both in the number of components required to perform a processing operation and a reduction in the time required for the operation.
Analogue signal processing is currently under-utilised. One reason for the relatively low usage of analogue processing is that the design of analogue circuits, which commonly is at component level, is a complex process requiring a considerble investment of time in both design and testing of a circuit. Analogue design is very specialised, requiring a detailed knowledge of the response of individual components, and consequently is expensive. Thus, when faced with a signal processing task, a designer may be willing to sacrifice the speed and simplicity of a custom built analogue circuit in favour of a less efficient but more easily realised digital circuit
An analogue processor which could be configured via a computer interface to perform required tasks would clearly be all extremely useful and beneficial development. Such a processor would allow a relatively inexperienced person to produce a required analogue circuit. Furthermore, the processor could be configured to perform a given task very rapidly, a considerable advantage over the current standard development process which comprises circuit design, manufacture, prototype testing and redesign.
One known design of analogue signal processor uses switched capacitor circuits based on digital technology. Conventional operational amplifiers within the processor are provided with feedback loops containing switchable capacitors which are switched on or off to select required mathematical functions. While this approach provides an adequate programmable analogue processor, it is rather bulky and contains a large number of components which occupy a large area.
The concept of a different computational approach to VLSI analogue design was described by D. Grundy in a paper published in 1994 (Journal of VLSI Signal Processing 53, 8 (1994)). The paper describes how a programmable analogue processor could be realised by reducing a required process to a series of fundamental mathematical steps, these steps being ADD, NEGATE, LOG, ANTILOG, AMPLIFY, (EXPONENTIAL) and DIFFERENTIATE. The paper suggests that any process capable of being broken down into a series of mathematical steps could be programmed into an analogue processor by providing the processor with cells each of which can be programmed to perform any one of the steps, selecting the steps to be performed by individual cells, and connecting them in the required order.
SUMMARY
The configuration of programmable analogue circuit suggested in the paper comprises two strings of cells connected in series, each string receiving an input signal. Each cell is programmed to perform a mathematical function chosen from the above list, and the output from one cell becomes the input to a following cell in a series of cells. The two strings may be linked together to perform functions (for example division) which require two inputs and a combination of cells. An experimental circuit which has been used to generate a logarithmic function is illustrated in
FIG. 7
of the paper. The circuit uses silicon junctions to provide logarithmic functions and resistors to convert voltages into current. The circuit has the advantage over switched capacitor circuits of more functions, wider dynamic range, real time operation and speed for a given device size. A disadvantage of this design of circuit is the requirement for external components to set gain and RC time constraints. The advantages outweigh the disadvantages however in many applications, and the present invention is related to a practical device for implementing a system of the same general type as that described in the above paper.
It is an object the present invention to provide an improved field programmable analogue processor.
According to the present invention, there is provided a programmable analogue device comprising an array of cells each of which is controllable to perform any one of a predetermined set of analogue functions, and means for selectively interconnecting the cells to define an analogue circuit between a device input and a device output, wherein each cell comprises an array of subcells each of which is designed to perform a respective one of the predetermined set of analogue functions, each cell comprises an input bias circuit, each subcell comprises a series switch which may be selectively switched to a conductive state so as to connect the subcell to the input bias circuit, each cell comprises a function control circuit which selectively switches on one of the series switches in dependence upon a function select input, each subcell comprises a differential pair of transistors which when electrically coupled by the respective series switch to the bias circuit define an operational amplifier with the input bias circuit, and each cell comprises an output circuit connected to each of the subcells such that the output circuit delivers an analogue output dependent upon the function of the operational amplifier defined by the input bias circuit and the differential transistor pair to which the input bias circuit is connected by the conductive series switch.
Preferably, further switches are provided each of which forms part of a respective subcell and is controlled by the function control circuit to be rendered non-conductive only when the series switch of the respective subcell is conductive, the further switches being arranged when conductive to minimize the effect of the associated subcell on the operation of the device.
The further switches may be connected to shunt resistive components of the associated subcells.
The differential pain of transistors of at least one subcell may be connected to an associated resistive component by an isolating switch which is connected in series between the resistive component and the differential pair of transistors, the isolating switch being rendered conductive only when the series switch of the subcell is rendered conductive. In circuits in which the differential pair of transistors is coupled to source and feedback resistors, respective isolating switches may be connected in series with those resistors. A shunt switch may be connected between the two isolating switches.


REFERENCES:
patent: 5541538 (1996-07-01), Bacrania et al.
patent: 5563526 (1996-10-01), Hastings et al.
patent: 5959871 (1999-09-01), Pierzchala et al.
patent: 6121823 (2000-09-01), Summerfield
patent: 0 450 863 (1991-10-01), None
Vallancourt et al, “Timing-Controlled Fully Programmable Analog Signal Processors Using Switched Continuous-Time Filters,” IEEE, Aug. 1988, pp. 947-954.*
Lu et al, “The Design of the CMOS Current-Mode General-Purpose Analog Processor,” IEEE, Jun. 1994, pp. 549-552.*
Song et al, “Design of a Geometric-Mean Generator Based on Switched-Current Technique,” IEEE, 1996, pp. 409-412.*
D.L. Grundy, “A Computational Approach to VLSI Analog Design”, Journal of VLSI Signal Processing 8 (1994) Jul., No. 1., 8 pp.
Press Release—Dec. 5th, 1995,Pilkington Licenses New Programmable Analogue Array Technology to Motorola, 1 pg.
IMP50E10 Data Sheet,EPAC product line, “General Description”, Jan. 3, 1996, 2 pgs.
IMP50E10 EPAC Data Sheet, “EPAC Feature Highlights”, Jan. 3, 1996, 3 pgs.
IMP50E10 EPAC Data Sheet, “Functional Modules”, Jan. 3, 1996, 3 pgs.
IMP50E20 Advance Product Data Sheet, Jan. 3, 1996, 8 pgs.
Edward K.F. Lee et al., “A Transconductor-Based Field Programmable Analog Array”, Feb. 16, 1995 IEEE International Solid-State Circuits Conference,

Affiliated with

Also associated with

Rating

Field programmable analogue processor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Field programmable analogue processor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Field programmable analogue processor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2862413