Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1999-08-16
2000-11-07
Smith, Matthew
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438589, 438593, H01L 213205, H01L 214763
Patent
active
061436356
ABSTRACT:
Metal oxide semiconductor field effect transistor (MOSFET) including a drain region and a source region adjacent to a channel region. A gate oxide is situated on the channel region and a gate conductor with vertical side walls is placed on the gate oxide. The MOSFET further includes a threshold adjust implant region and/or punch through implant region being aligned with respect to the gate conductor and limited to an area underneath the gate conductor. Such a MOSFET can be made using the following method: forming a dielectric stack on a semiconductor structure; defining an etch window on the dielectric stack having the lateral size and shape of a gate hole to be formed; defining the gate hole in the dielectric stack by transferring the etch window into the dielectric stack using a reactive ion etching (RIE) process; implanting threshold adjust dopants and/or punch through dopants through the gate hole; depositing a gate conductor such that it fills the gate hole; removing the gate conductor covering portions of the semiconductor structure surrounding the gate hole; and removing at least part of the dielectric stack.
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Boyd Diane C.
Burns Stuart M.
Hanafi Hussein I.
Taur Yuan
Wille William C.
International Business Machines - Corporation
Malsawma Lex H.
Smith Matthew
Townsend, Esq. Tiffany
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