Field effect transistor with T-shaped gate electrode

Details Field effect transistor with T-shaped gate electrode Field effect transistor with T-shaped gate electrode

1992-10-09

1995-01-24

Loke, Steven Ho Yin

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257408, 257383, 257764, 257768, H01L 2976, H01L 2994, H01L 2348, H01L 2352

Patent

active

053844793

ABSTRACT:
A semiconductor device with a small gate-source capacitance is fabricated by growing a semiconductor epitaxial layer of a first conductivity type on a substrate. Two metal layers that are etched at different rates are successively deposited on the epitaxial layer. The metal layers are dry-etched to form a gate electrode including a wider (larger gate length) upper gate electrode section and a narrower (smaller gate length) lower gate electrode section. The upper gate electrode section is used as a mask for implanting a dopant impurity into the semiconductor epitaxial layer to form a source region having an edge close to but not extending beneath the lower gate electrode section.

REFERENCES:
patent: 5115290 (1992-05-01), Murakami et al.
Smith et al, "A 0.25-.mu.m Gate-Length Pseudomorphic HFET With 32-mW Output Power At 94 GHz", IEEE Electron Device Letters, vol. 10, No. 10, Oct. 1989, pp. 437-439.
"Process For Making Very Small, Asymmetricm Field-Effect Transistors", IBM Technical Disclosure Bulletin, vol. 30, No. 3, Aug. 1987, pp. 1136-1137.
Ohta et al, Quadruply Self-Aligned MOS (QSA MOS)-- A New Short-Channel High-Speed High--Density MOSFET for VLSI, IEEE Journal of Solid-State Circuits, vol. SC-15, No. 4, Aug. 1980, pp. 417-423.
Ueda et al, A New Vertical Double Diffused MOSFET--The Self--Aligned Terraced--Gate MOSFET, IEEE Transactions on Electron Devices, vol. ED-31, No. 4, Apr. 1984, pp. 416-420.
Suzuki et al, A New Self-Aligned GaAs FET With A Mo/WSi.sub.x T-Gate, IEEE Electron Device Letters, vol. EDL-6, No. 10, Oct. 1985, pp. 542-544.
Rodder et al, "Raised Source/Drain MOSFET With Dual Sidewall Spacers", IEEE Electron Device Letters, vol. 12, No. 3, Mar. 1991, pp. 89-91.

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