Field effect transistor with recessed buried source and drain re

Details Field effect transistor with recessed buried source and drain re Field effect transistor with recessed buried source and drain re

1996-04-23

1998-01-06

Loke, Steven H.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257408, H01L 2976, H01L 2994

Patent

active

057058407

ABSTRACT:
The invention describes recessed source/drain regions formed in trenches in the substrate that provide a smooth surface topology, smaller devils and improved device performance. The recessed source/drain regions have two conductive regions: the first upper lightly doped region on the trench sidewalls, and the second lower region under the trench bottom. In addition, two buried layers are formed between adjacent source/drain regions: a threshold voltage layer near the substrate surface and an anti-punchthrough layer formed at approximately the same depth as the lower source/drain regions on the trench bottoms. The upper lightly doped source/drain region and the anti-punchthrough layer have the effect of increasing the punchthrough voltage without increasing the threshold voltage. The upper and lower source/drain regions lower the overall resistivity of the source/drain allowing use of smaller line pitches and therefore smaller devils. Overall, the recessed source/drain regions and the two buried layers allow the formation of smaller devices with improved performance.

REFERENCES:
patent: 4653177 (1987-03-01), Lebowitz et al.
patent: 5041885 (1991-08-01), Gualandris et al.
patent: 5114865 (1992-05-01), Kimura
patent: 5118636 (1992-06-01), Hosaka
patent: 5156985 (1992-10-01), Yamada et al.

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