Field effect transistor with impurity concentration peak under g

Details Field effect transistor with impurity concentration peak under g Field effect transistor with impurity concentration peak under g

1997-08-27

1999-04-20

Chaudhuri, Olik

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257285, 438289, 438290, H01L 21335

Patent

active

058959548

ABSTRACT:
Reverse short-channel effect is suppressed in a field effect transistor with a gate having a short length. The field effect transistor comprises a p-type silicon substrate, a gate electrode, paired lightly doped source/drain regions, and paired heavily doped source/drain regions. A boron concentration peak region is formed in the silicon substrate. A boron concentration peak region positioned at an end of the gate electrode has a length d of one fourth of a length L of the gate electrode, and extends from the end to the center of the gate electrode.

REFERENCES:
patent: 5391508 (1995-02-01), Matsuoka et al.
patent: 5449937 (1995-09-01), Arimura et al.
patent: 5792699 (1998-08-01), Tsui
Explanation of Reverse Short Channel . . . , C.S. Rafferty et al., IEEE 1993, pp. 311-314.
Guidelines for Reverse Short-Channel Behavior, C. Mazure et al . . . , IEEE Electron Device Letters, vol. 10, No. 12, Dec. 1989 pp. 556-558.

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