Field effect transistor with etched-back gate dielectric

Details Field effect transistor with etched-back gate dielectric Field effect transistor with etched-back gate dielectric

2006-07-04

2006-07-04

Geyer, Scott B. (Department: 2812)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

Reexamination Certificate

active

07071122

ABSTRACT:
A method for making an ultrathin high-k gate dielectric for use in a field effect transistor is provided. The method involves depositing a high-k gate dielectric material on a substrate and forming an ultrathin high-k dielectric by performing a thinning process on the high-k gate dielectric material. The process used to thin the high-k dielectric material can include at least one of any number of processes including wet etching, dry etching (including gas cluster ion beam (GCIB) processing), and hybrid damage/wet etching. In addition to the above, the present invention relates to an ultrathin high-k gate dielectric made for use in a field-effect transistor made by the above method.

REFERENCES:
patent: 2003/0104706 (2003-06-01), Mitsuhashi et al.
patent: 2004/0038538 (2004-02-01), Ho et al.
Morisaki et al. ( Ultra-thin (Teffinv = 1.7nm Poly-Si-gated SiN/HfO2/SiON High-k Stack Dielectrics with High Thermal Stability (1050 degrees C.)), Electron Devices Meeting, 2002. IEDM '02. Digest. International, Dec. 8-11, 2002, pp. 861-864.
Ng et al. (Electrical Characteristics of Novel Hafnium Oxide Film), 2002, pp. 51-54.
Zhan et al. (Characteristics of High Quality Hafnium Oxide gate Dielectric), 2002, pp. 43-46.
Jakub Kedzierski, et al., Metal-gate FinFET and fully-depleted SOI devices using total gate silicidation, IBM Semiconductor Research and Development Center pp. 247-250.
B. Guillaumot, et al., 75nm Damascene Metal Gate and High-k Integration for Advanced CMOS Devices, Cedex France, Meylan France, Marseille France, pp. 355-358.
Katherine L. Saenger, et al., A Selective Etching Process for Chemically Inert High-k Oxides, Mat. Res. Soc. Symp. Proc. vol. 745 © 2003 Material Research Society, IBM Research Division, T.J. Watson Research Center.
Matsuo J. Yamada, , et al., Surface processing by gas cluster ion beams at the atomic (molecular) level, Ion Beam Engineering Experimental Laboratory, Kyoto University, Sakyo, Kyoto 606, Japan.

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