Field-effect transistor structure and associated...

Details Field-effect transistor structure and associated... Field-effect transistor structure and associated...

2007-07-31

2007-07-31

Tran, Thien F (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S304000, C257S305000, C257S311000

Reexamination Certificate

active

11133086

ABSTRACT:
A field-effect transistor (FET) structure and method of formation thereof is presented. The FET structure includes first and second source/drain regions formed in a semiconductor substrate to define a channel region. A gate insulation layer is formed at a surface of the channel region. A control layer is formed at a surface of the gate insulation layer. A diode doping region is formed to realize a diode in the semiconductor substrate. An electrically conductive diode connection layer connects the diode doping region to the control layer. A depression is formed in the semiconductor substrate. The diode doping region is formed at a bottom of the depression and the diode connection layer is formed in the depression to dissipate excess charge carriers in the semiconductor substrate.

REFERENCES:
patent: 5366908 (1994-11-01), Pelella
patent: 6046480 (2000-04-01), Matsumoto et al.
patent: 6191455 (2001-02-01), Shida
patent: 2001/0003369 (2001-06-01), Roche
International Search Report from corresponding PCT application No. PCT/DE2003/03748, no date.
International Examination Report from corresponding PCT application No. PCT/DE2003/03748, no date.

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