Field effect transistor having a stressed contact etch stop...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S240000, C438S289000, C438S303000, C438S525000, C257SE21252, C257SE21577

Reexamination Certificate

active

07932166

ABSTRACT:
By forming a highly non-conformal stressed overlayer, such as a contact etch stop layer, the efficiency of the stress transfer into the respective channel region of a field effect transistor may be significantly increased. For instance, non-conformal PECVD techniques may be used for forming highly stressed silicon nitride in a non-conformal manner, thereby achieving higher transistor performance for otherwise identical stress conditions.

REFERENCES:
patent: 7052946 (2006-05-01), Chen et al.
patent: 2005/0158955 (2005-07-01), Yang et al.
patent: 2007/0096220 (2007-05-01), Kim et al.
patent: 2008/0122003 (2008-05-01), Fang et al.
patent: 1 717 864 (2006-11-01), None
Widmann et al., “Technologie hochintegrierter Schaltungen,” p. 315.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Field effect transistor having a stressed contact etch stop... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Field effect transistor having a stressed contact etch stop..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Field effect transistor having a stressed contact etch stop... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2719596

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.