Field effect transistor device with single layer integrated meta

Details Field effect transistor device with single layer integrated meta Field effect transistor device with single layer integrated meta

1996-07-22

1997-12-16

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

257472, 257330, 257288, 257494, H01L 2348, H01L 2352, H01L 2940

Patent

active

056989008

ABSTRACT:
A periodic table group III-IV field-effect transistor device is described. The disclosed device uses a single metalization for ohmic and Schottky barrier contacts, permanent plural etch stop layers, employs a non-alloyed ohmic connection semiconductor layer and includes a permanent semiconductor material-comprised secondary mask element, a mask element which can be grown epitaxially during wafer fabrication to perform useful functions in both the device processing and device utilization environments. The device of the invention may be achieved with both an all optical lithographic process and a combined optical and electron beam lithographic process The disclosed device provides a field-effect transistor of reduced fabrication cost, increased dimensional accuracy and state of the art electrical performance.

REFERENCES:
patent: 3764865 (1973-10-01), Napoli et al.
patent: 3855690 (1974-12-01), Kim et al.
patent: 3861024 (1975-01-01), Napoli et al.
patent: 3943622 (1976-03-01), Kim et al.
patent: 4961194 (1990-10-01), Kuroda et al.
patent: 5021857 (1991-06-01), Suehiro
patent: 5041393 (1991-08-01), Ahrens et al.
patent: 5091259 (1992-02-01), Shih et al.
patent: 5288654 (1994-02-01), Kasai et al.
patent: 5312765 (1994-05-01), Kanber
patent: 5352909 (1994-10-01), Hori
patent: 5521403 (1996-05-01), Usui et al.
Ohmic Contacts to n-GaAs Using Graded Band Gap Layers of Ga.sub.1-x In.sub.x As Grown by Molecular Beam Epitaxy, authorized by J.M. Woodall et al., p. 626 in the J. Vac. Sci. Technol. vol. 19, No. 3, Sep./Oct. 1981.
HEMT with Nonalloyed Ohmic Contacts Using n.sup.+ -InGaAs Cap Layer, authorized by S. Kuroda et al., p. 389 in the IEEE Electron Device Letters, vol. EDL-8, No. 9, Sep. 1987.
Extremely Low Nonalloyed and Alloyed Contact Resistance Using an InAs Cap Layer on InGaAs by Molecular-Beam Epitaxy, authored by C.K. Peng et al., p. 429 in the J. Appl. Phys. vol. 64, No. 1, Jul. 1, 1988.
Non-Alloyed Ohmic Contacts to n-GaAs Using Compositionally Graded In.sub.x Ga.sub.1-x As Layers, authored by T. Nittono et al., pp. 1718-1722 in the Japanese Journal of Applied Physics, vol. 27, No. 9, Sep. 1988.
Extremely Low Contact Resistances for AlGaAs/GaAs Modulation-Doped Field-Effect Transistor Structures, Authored by A. Ketterson et al., p. 2305 in the J. Appl. Phys. vol. 57, No. 6, Mar. 1985.
Single-Cycle Lithography Process for Both Large and Sub-Half Micron Features, authorized by J.S. Sewell et al., p. 177 in the SPIE, vol. 1671, 1992.
A Combined Electron Beam/Optical Lithography Process Step for the Fabrication of Sub-Half-Micron-Gate-Length MMIC Chips, authorized by J.S. Sewell et al., and appearing in the Conference Proceedings of the Fourth National Technology Transfer Conference and Exposition, Dec. 7-9, 1993, Anaheim, California, NASA Conference Publication 3249, vol. 1, p. 54.
Etch Rates and Selectivities of Citric Acid/Hydrogen Peroxide on GaAs, Al.sub.0.3 Ga.sub.0.7 As, In.sub.0.2 Ga.sub.0.8 As, In.sub.0.53 Ga.sub.0.47 As, In.sub.0.52 Al.sub.0.48 As, and InP, authored by G.C. DeSalvo et al., p. 831 in the J. Electrochem. Soc., vol. 9, No. 3, Mar. 1992.
Citric Acid Etching of GaAs.sub.1-x Sb.sub.x, Al.sub.0.5 Ga.sub.0.5 Sb, and InAs for Heterostructure Device Fabrication, authored by G.C. DeSalvo et al., p. 3526 in the J. Electrochem. Soc., vol. 141, No. 12, Dec. 1994.
High-Performance Self-Aligned p.sup.+
GaAs Epitaxial JFET's Incorporating AlGaAs Etch-Stop Layer, authored by J.K. Abrokwah et al., p. 1529 in the IEEE Transactions on Electron Devices, vol. 37, No. 6, Jun. 1990.
Making a High-Yield, 0.33 Micron, MBE-Based GaAs MMIC Production Process, authored by R.D. Remba et al., p. 90 in the proceedings of the 1994 U.S. Conference on GaAs Manufacturing Technology (MANTECH), May 1994.
Simplified Ohmic and Schottky Contact Formation for Field Effect Transistors Using the Single Layer Integrated Metal Field Effect Transistor (SLIMFET) Process, authored by G.C. DeSalvo et al., p. 314 in the IEEE Transactions on Semiconductor Manufacturing, vol. 8, No. 3, Aug. 1995.
All-Refractory GaAs FET Using Amorphous TiWSi.sub.x Source/Drain Metallization and Graded-In.sub.x Ga.sub.1-x As Layers, authored by N.A. Papanicolaou et al., p. 7 in the IEEE Electron Device Letters, vol. 15, No. 1, Jan. 1994.
A New Fabrication Technology for AlGaAs/GaAs HEMT LSI's Using InGaAs Nonalloyed Ohmic Contacts, authored by S. Kuroda et al., p. 2196 in the IEEE Transactions on Electron Devices, vol. 36, No. 10, Oct. 1989.
A Highly Manufacturable 0.2 .mu.m AlGaAs/InGaAs PHEMT Fabricated Using the Single-Layer Integrated-Metal FET (SLIMFET) Process, authored by Charles K. Havasy et al., appearing in the IEEE Gallium Arsenide Integrated Circuit Symposium, Conference Proceedings, San Diego CA, Oct. 1995.

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