Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
Reexamination Certificate
2007-02-13
2007-02-13
Huynh, Andy (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having schottky gate
C257S192000, C257S194000, C257SE21444, C257SE29061, C438S167000, C438S936000
Reexamination Certificate
active
11031183
ABSTRACT:
The present invention is a novel field effect transistor having a channel region formed from a narrow bandgap semiconductor film formed on an insulating substrate. A gate dielectric layer is formed on the narrow bandgap semiconductor film. A gate electrode is then formed on the gate dielectric. A pair of source/drain regions formed from a wide bandgap semiconductor film or a metal is formed on opposite sides of the gate electrode and adjacent to the low bandgap semiconductor film.
REFERENCES:
patent: RE33584 (1991-05-01), Mimura
patent: 5111255 (1992-05-01), Kiely et al.
patent: 5142349 (1992-08-01), Zhu et al.
patent: 5144378 (1992-09-01), Hikosaka
patent: 5164797 (1992-11-01), Thornton
patent: 5245208 (1993-09-01), Eimori
patent: 5378912 (1995-01-01), Pein
patent: 5378923 (1995-01-01), Mitsui et al.
patent: 5430310 (1995-07-01), Shibasaki et al.
patent: 5448086 (1995-09-01), Hida
patent: 5581092 (1996-12-01), Takemura
patent: 5681761 (1997-10-01), Kim
patent: 5683934 (1997-11-01), Candelaria
patent: 5698869 (1997-12-01), Yoshimi et al.
patent: 5760442 (1998-06-01), Shigyo et al.
patent: 5767549 (1998-06-01), Chen et al.
patent: 5770881 (1998-06-01), Pelella et al.
patent: 5798540 (1998-08-01), Boos et al.
patent: 5798555 (1998-08-01), Mishra et al.
patent: 5940695 (1999-08-01), Berenz
patent: 5956584 (1999-09-01), Wu
patent: 5986291 (1999-11-01), Currie et al.
patent: 6207977 (2001-03-01), Augusto
patent: 6326291 (2001-12-01), Yu
patent: 6436776 (2002-08-01), Nakayama
patent: 7053459 (2006-05-01), Yamamoto
patent: 2001/0045604 (2001-11-01), Oda
patent: 0 531 550 (1993-03-01), None
patent: 1 020 898 (2000-07-01), None
patent: 1 119 029 (2001-07-01), None
patent: 60-251666 (1986-05-01), None
patent: WO 01/88995 (2001-11-01), None
International Search Report PCT/US 03/34667.
Ikeda, K. et al. “50-NM Gate Schottky Source/Drain P-MOSFETS with a SIGE Channel” IEEE Electron Device Letters, IEEE Inc., New York, US, vol. 23, No. 11, Nov. 2002, pp. 670-672, XP001158217, ISSN: 0741-3106, Figure 1.
Chang, C-Y et al. “High Performance Thin-Film Transistors with Low-High-Low Band Gap Engineering”, Proceeding of the SPIE, Bellingham, VA, US, vol. 3421, Jul. 1998, pp. 152-158, XP001189049, ISSN: 0277-786X.
Barlage Doulgas
Chau Robert S.
Jin Been-Yih
Engineer Rahul D.
Huynh Andy
Intel Corporation
Nguyen Dao H.
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