Active solid-state devices (e.g. – transistors – solid-state diode – Including semiconductor material other than silicon or... – Containing germanium – ge
Reexamination Certificate
2006-05-02
2010-11-02
Bryant, Kiesha R (Department: 2891)
Active solid-state devices (e.g., transistors, solid-state diode
Including semiconductor material other than silicon or...
Containing germanium, ge
C257S369000, C438S933000
Reexamination Certificate
active
07825493
ABSTRACT:
A field-effect transistor that increases the operation speeds of complementary field-effect transistors. Each of an nMOSFET and a pMODFET has a Ge channel and source and drain regions formed of an NiGe layer. The height of Schottky barriers formed at a junction between a channel region and the source region of the nMOSFET and at a junction between the channel region and the drain region of the nMOSFET is changed by very thin high-concentration segregation layers formed by making As atoms, Sb atoms, S atoms, or the like segregate at the time of forming the NiGe layer. As a result, Schottky barrier height suitable for the nMOSFET and the pMODFET can be obtained, thus being capable of realizing high-speed CMOSFETs.
REFERENCES:
patent: 5266813 (1993-11-01), Comfort et al.
patent: 6621131 (2003-09-01), Murthy et al.
patent: 6844227 (2005-01-01), Kubo et al.
patent: 7528058 (2009-05-01), Mantl et al.
patent: 2004/0014276 (2004-01-01), Murthy et al.
patent: 2005/0093033 (2005-05-01), Kinoshita et al.
patent: 10334353 (2005-02-01), None
Shimizu et al., Local Mechanical-Stress Control (LMC): A New Technique for CMOS-Performance Enhancement, 2001, IEEE, pp. 19.4.1-19.4.4.
“Extended European Search Report”, Mailed Jun. 3, 2009 regarding corresponding European Patent Application No. 06252151.
Han, De-Dong et al.,“Fabrication and characteristics of Ni-germanide Schottky contacts with Ge”,Chinese Physics, vol. 14, No. 5 May 1, 2005, 1041-1043.
Ikeda, Keiji et al.,“Moduration of NiGe/Ge Schottky barrier height by sulfur segregation during Ni germanidation”,Applied Physics Letters, vol. 88, No. 15 Apr. 14, 2006, 152115.
Kinoshita, A et al.,“High-performance 50-nm-gate-length schottky-source/drain MOSFETs with dopant-segregation junctions”,2005 Symposium on VLSI Technology Digest of Technical PapersJun. 14, 2005, 158-159.
Bryant Kiesha R
Fujitsu Patent Center
Fujitsu Semiconductor Limited
Wright Tucker
LandOfFree
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