Field effect transistor and manufacturing method thereof

Details Field effect transistor and manufacturing method thereof Field effect transistor and manufacturing method thereof

2006-10-10

2006-10-10

Fourson, George R. (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S402000, C257S405000, C257S407000, C257S409000

Reexamination Certificate

active

07119402

ABSTRACT:
A field effect transistor includes a first semiconductor region forming a channel region, a gate electrode insulatively disposed above the first semiconductor region, source and drain electrodes formed to sandwich the first semiconductor region in a channel lengthwise direction, and second semiconductor regions formed between the first semiconductor region and the source and drain electrodes and having impurity concentration higher than the first semiconductor region. The thickness of the second semiconductor region in the channel lengthwise direction is set to a value equal to or less than depletion layer width determined by the impurity concentration so that the second semiconductor region is depleted in a no-voltage application state.

REFERENCES:
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patent: 5170231 (1992-12-01), Fujii et al.
patent: 5675533 (1997-10-01), Niuya et al.
patent: 5936265 (1999-08-01), Koga
patent: 6683362 (2004-01-01), O et al.
patent: 2001/0028067 (2001-10-01), Awano
patent: 09-260690 (1997-10-01), None
Tucker, J. R. et al., “Silicon Field-Effect Transistor Based on Quantum Tunneling”, Appl. Phys. Lett., vol. 65, No. 5, pp. 618-620, (Aug. 1, 1994).

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