Field effect transistor and fabrication method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S401000

Reexamination Certificate

active

07453124

ABSTRACT:
A field effect transistor of the present invention includes, on a semiconductor substrate, (i) a fin section formed in a fin shape protruding from the substrate, (ii) a gate dielectric for covering a channel region section of the fin section, (iii) a gate electrode that is insulated from the channel region section by the gate dielectric and is formed on the channel region section and (iv) an insulating layer for covering a surface of the semiconductor substrate. The fin section is formed so as to extend from the semiconductor substrate through the insulating layer and protrudes outward from a surface of the insulating layer. In this way, the channel region of the fin section is physically in contact with the substrate.

REFERENCES:
patent: 5844278 (1998-12-01), Mizuno et al.
patent: 5897351 (1999-04-01), Forbes
patent: 6432829 (2002-08-01), Muller et al.
patent: 6525403 (2003-02-01), Inaba et al.
patent: 7122871 (2006-10-01), Lee et al.
patent: 7148541 (2006-12-01), Park et al.
patent: 2002/0011612 (2002-01-01), Hieda
patent: 2004/0094807 (2004-05-01), Chau et al.
patent: 2002-110963 (2002-04-01), None
patent: 2002-118255 (2002-04-01), None
patent: 10-2003-0065631 (2003-08-01), None
H.S.P. Wong, “Beyond the conventional Transistor” IBM Journal of Research and Development, vol. 46, No. 2/3, Mar./May 2002, pp. 133-168.
Hisamoto et al., “FinFET-A Self-Aligned Double-Gate MOSFET Scalable to 20nm”, IEEE Transactions on Electron Devices, vol. 47, No. 12 Dec. 2000, pp. 2320-2325.
B. Doyle et al., “Tri-Gate Fully-Depleted CMOS Transistors” Fabrication, Design and Layout, 2003 Symposium on VLSI Technology Digest of Technical Papers, 2 pages.
T. Parke et al., “Fabrication of body-Tied FinFETs (Omega MOSFETs) Using BulkSi Wafers”, 2003 Symposium on VLSI Technology Digest Of Technical Papers, 2 pages.
Tang, S.H. et al., “Solid-State Circuits Conference”, Digest of Technical Papers, ISSCC, IEEE International, 2001, pp. 118-119, 437.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Field effect transistor and fabrication method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Field effect transistor and fabrication method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Field effect transistor and fabrication method thereof will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4028126

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.