Fibre channel architecture port having optical and copper...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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C710S072000, C385S055000, C370S464000

Reexamination Certificate

active

07120721

ABSTRACT:
First and second inputs are associated with a port. Logic produces indications to software to cause the first input and second input to appear as a single input to the software. The logic produces an indication that no signal is present on either the first input or the second input. When a port bypass controller is coupled to the port, the logic produces an indication that both the first and second inputs are bypassed. When the port bypass controller is coupled to a Fibre Channel arbitrated loop, the logic produces a first signal to control whether the first input is included on the Fibre Channel arbitrated loop or bypassed, and a second signal to control whether the second input is included in the Fibre Channel arbitrated loop or bypassed.

REFERENCES:
patent: 4193478 (1980-03-01), Keller et al.
patent: 5455556 (1995-10-01), Ohm et al.
patent: 5647379 (1997-07-01), Meltzer
patent: 6058076 (2000-05-01), Komninos
“Architecture for real-time LPC-based feature measurement integrated circuit” by Oh, Y.; Ackenhusen, J.; Breda, L.; Rosa, L.; Brown, M.; Niles, L. (abstract only) Publication Date: Mar. 1984.

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