FET oscillator exhibiting negative resistance due to high impeda

Oscillators – With distributed parameter resonator – Parallel wire type

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Details

331115, 331117FE, H03B 712

Patent

active

046300031

ABSTRACT:
An FET oscillator wherein a bias circuit is connected to a drain of a field-effect transistor and a source circuit including a transmission line and a self-bias circuit is connected to a source of the transistor, so that the source is substantially open-circuited at an oscillation frequency and the field-effect transistor operates as a two-terminal (the gate and drain) element exhibiting a negative resistance, and wherein a resonant circuit is connected to the gate of the transistor. With the source circuit connected to the transistor source, the oscillator can have a high unloaded Q-value of Qo and a high externally-loaded Q-value of Q.sub.ext, whereby the oscillation frequency is stable. According to this oscillator, only a single bias circuit for the drain is required without the need of a bias circuit for the gate.

REFERENCES:
patent: 4149127 (1979-04-01), Murakami et al.
patent: 4187476 (1980-02-01), Shinkawa et al.
patent: 4189688 (1980-02-01), Sechi et al.
patent: 4435688 (1984-03-01), Shinkawa et al.
patent: 4445097 (1984-04-01), Godart et al.

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