Loop scheduler

Details Loop scheduler Loop scheduler

1994-01-25

1996-02-13

Heckler, Thomas M.

Boots, shoes, and leggings

364DIG1, 3642805, G06F 945

Patent

active

054918235

ABSTRACT:
A loop scheduler in a software compiler system for generating a schedule for executing in a target computer loops of instructions contained in a computer program is described. The loop scheduler operates by searching for an optimal loop schedule for executing a particular instruction loop in the target computer. The loop scheduler then identifies loop overhead instructions and non-loop overhead instructions in the particular instruction loop. A replicated loop schedule is generated by the loop scheduler by replicating the non-loop overhead instructions in the loop schedule by a replication factor such that overlap of each operation instance in the optimal loop schedule with itself is prevented. The loop scheduler inserts the loop overhead instructions into the replicated loop schedule to generate a modified loop schedule, and then allocates registers of the target computer to the modified loop schedule.

REFERENCES:
patent: 4782444 (1988-11-01), Munshi et al.
patent: 5367651 (1994-11-01), Smith et al.
patent: 5386562 (1995-01-01), Jain et al.
Lam, Monica, "Software Pipelining: An Effective Scheduling Technique for VLIW Machines", Department of Computer Science, Carnegie Mellon University, Proceedings of the SIGPLAN '88 Conference on Programming Language Design and Implementation, Atlanta, Georgia, Jun. 22-24, 1988, pp. 318-328.
Lam, Monica Sin-Ling, "A Systolic Array Optimizing Compiler", Computer Science Department, Carnegie Mellon University, May 1987, pp. 1-138.
Aho, Alfred V., Ravi Sethi and Jeffery D. Ullman, Compliers Principles, Techniques, and Tools, Bell Telephone Laboratories, Incorporated, 1986, pp. 513-519, 585-722.
James C. Dehnert et al., "Compiling for the Cydra 5", The Journal of Supercomputing, 7, pp. 181-227 (1993).

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