Ferroelectric semiconductor memory device and a fabrication...

Details Ferroelectric semiconductor memory device and a fabrication... Ferroelectric semiconductor memory device and a fabrication...

2001-02-28

2003-09-09

Flynn, Nathan J. (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S296000

Reexamination Certificate

active

06617626

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention generally relates to semiconductor devices and more particularly to a semiconductor memory device having a ferroelectric capacitor.
Semiconductor devices such as DRAMs and SRAMs are used extensively in various information processing apparatuses including computers as a high-speed main memory device. These conventional semiconductor devices, however, are volatile in nature and the information stored therein is lost when the electric power is turned off. Thus, it has been practiced in conventional computers and computer systems to use magnetic disk devices as a large capacity, auxiliary storage device for storing programs and data.
However, magnetic disk devices are bulky and fragile, and are inherently vulnerable to mechanical shocks. Further, magnetic disk devices generally have drawbacks of large electrical power consumption and low access speed.
In view of the problems noted above, there is an increasing tendency in computers and computer systems of using flash-memory devices for the non-volatile auxiliary storage device. A flash-memory device is a device having a construction similar to that of a MOS transistor and stores information in an insulated floating gate in the form of electrical charges. It should be noted that flash-memory devices have a construction suitable for monolithic integration on a semiconductor chip in the form of an LSI. Thus, there are attempts to construct a large-capacity storage device comparable to a magnetic disk device by using a flash-memory.
In a flash-memory device, writing of information is achieved by tunneling of hot electrons through a tunneling insulation film into the floating gate electrode. Further, erasing of the information is achieved also by causing the electrons in the floating gate to tunnel to a source region or to a channel region through the tunneling insulation film. Thus, a flash-memory device has an inherent drawback in that it takes a substantial time for writing or erasing information. Further, a flash-memory device generally shows the problem of deterioration of the tunneling insulation film after a repeated writing and erasing operations. When the tunneling insulation film is deteriorated, the reading or erasing operation becomes unstable and unreliable. An EEPROM, having a similar construction to a flash-memory, has a similar problem.
In view of the various drawbacks of the foregoing conventional non-volatile semiconductor devices, there is a proposal of a ferroelectric semiconductor memory device designated hereinafter as FeRAM for the auxiliary memory device and further for the high-speed main memory device of a computer. A ferroelectric semiconductor memory device stores information in a ferroelectric capacitor insulation film in the form of spontaneous polarization.
A ferroelectric semiconductor memory device typically includes a memory cell transistor and a memory cell capacitor similarly to a DRAM, wherein the memory cell capacitor uses a ferroelectric material such as PZT (Pb(Zr,Ti)O
3
) or PLZT ((Pb,La)(Zr,Ti)O
3
) for the capacitor insulation film. Thus, the ferroelectric semiconductor memory device is suitable for monolithic integration to form an LSI.
As the ferroelectric semiconductor memory device carries out writing of information by controlling the spontaneous polarization of the ferroelectric capacitor insulation film, the writing operation is achieved with high speed, faster by a factor of 1000 or more than the case of a flash-memory. As noted before, the writing of information is achieved in a flash-memory by injecting hot electrons into the floating gate through the tunneling insulation film. As the control of the polarization is achieved by simply applying a voltage, the power consumption is also reduced below about 1/10 as compared with the case of a flash-memory. Further, the ferroelectric semiconductor memory device, lacking the tunneling insulation film, provides an increased lifetime of one hundred thousand times as large as the lifetime of a flash-memory device.
FIG. 1
shows the construction of a conventional FeRAM
10
.
Referring to
FIG. 1
, the FeRAM
10
includes a memory cell transistor constructed on a Si substrate
11
, which may be any of the p-type or n-type. The half of the cell structure is represented in
FIG. 1
, wherein it should be noted that the process used in
FIG. 1
is nothing more than an ordinary CMOS process. Thus, a p-type well
11
A is formed on a Si substrate
11
, on which an active region is defined by a field oxide film
12
. On the Si substrate
11
, there is provided a gate electrode
13
in correspondence to the foregoing active region, wherein the gate electrode
13
constitutes the word line of the FeRAM. Further, a gate oxide film not illustrated is interposed between the Si substrate
11
and the gate electrode
13
, and diffusion regions
11
B and
11
C of the n
+
-type are formed in the p-type well
11
A at both lateral sides of the gate electrode
13
as the source region and the drain region of the memory cell transistor. Thereby, a channel region is formed in the p-type well
11
A between the diffusion region
11
B and the diffusion region
11
C.
It should be noted that the gate electrode
13
is covered by a CVD oxide film
14
provided so as to cover the surface of the Si substrate
11
in correspondence to the active region. A lower electrode
15
having a Pt/Ti structure is deposited on the CVD oxide film
14
, wherein the lower electrode
15
constitutes the drive line of the FeRAM. A ferroelectric capacitor insulation film
16
of PZT or PLZT covers the lower electrode
15
, and an upper electrode
17
of Pt is formed on the ferroelectric capacitor insulation film
16
.
It should be noted that the lower electrode
15
, the ferroelectric capacitor insulation film
16
and the upper electrode
17
form together a ferroelectric capacitor. The ferroelectric capacitor as a whole is covered by another interlayer insulation film
18
.
The contact hole
18
A is formed in the interlayer insulation film
18
so as to expose the upper electrode pattern
17
, and contact holes
18
B and
18
C are formed further in the interlayer insulation film
18
and
14
so as to expose the diffusion regions
11
B and
11
C, respectively.
The local interconnection pattern
19
A is formed by an Al-alloy such that the local interconnection pattern
19
A connects the contact hole
18
A and the contact hole
18
B electrically.
There is provided a bit line pattern
19
B of an Al-alloy on the interlayer insulation film
18
so as to make an electrical contact with the diffusion region
11
C at the contact hole
18
C. The local interconnection pattern
19
A and the bit line
19
B are covered by a passivation film
20
.
In such an FeRAM, it is important to maximize the switching electric charge of the ferroelectric capacitor insulation film
16
and minimize the leakage current. Further, it is necessary that the ferroelectric capacitor insulation film
16
maintains the initial switching electric charge over a long period of time.
In order to maximize the switching electric charge, it is practiced conventionally to deposit the ferroelectric capacitor insulation film
16
by a sputtering process in the form of an amorphous phase and apply a crystallization process in an O
2
atmosphere.
In order to maintain the large switching electric charge for the ferroelectric capacitor insulation film
16
, it is further desired to form the upper electrode
17
in an oxidizing atmosphere so as to avoid formation of oxygen defect in the ferroelectric capacitor insulation film. Thus, there is a proposal to use a conductive oxide such as IrO
2
for the upper electrode
17
in place of Pt.
It turned out, however, that a ferroelectric capacitor having the ferroelectric capacitor insulation film
16
of PZT in combination with the upper electrode of IrO
2
raises a problem of aging of the PZT film
16
in that the value of the switching electric charge decreases with time. In order to avoid this aging problem, it has been necessary to dope t

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