Ferroelectric semiconductor memory device

Static information storage and retrieval – Systems using particular element – Ferroelectric

Reexamination Certificate

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C365S173000

Reexamination Certificate

active

07551472

ABSTRACT:
A memory cell includes a ferroelectric capacitor for holding a charge and a transistor connected in parallel with the ferroelectric capacitor. A plurality of the ferroelectric memory cells are connected in series to form a memory cell block. A selection transistor connects, to one end of the block. A bit line connects to the selection transistor. A plate line connects to the other end of the block. A control circuit changes potentials of the word line and the bit line. With the potential of the plate line being held constant, the potential of the word line is changed, thereby erasing information or writing information to the ferroelectric memory cells.

REFERENCES:
patent: 5903492 (1999-05-01), Takashima
patent: 7061788 (2006-06-01), Ogiwara et al.
patent: 2005/0002247 (2005-01-01), Kamoshida et al.
patent: 10-255483 (1998-09-01), None

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