Ferroelectric random access memory device capable of...

Details Ferroelectric random access memory device capable of... Ferroelectric random access memory device capable of...

1999-10-27

2001-01-23

Nelms, David (Department: 2818)

Static information storage and retrieval

Systems using particular element

Ferroelectric

C365S065000, C365S189070, C365S230030, C365S230060

Reexamination Certificate

active

06178107

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a semiconductor device; and, more particularly, to a ferroelectric random access memory (FeRAM) device capable of reducing operation frequency of a reference cell.
DESCRIPTION OF THE PRIOR ART
Generally, a ferroelectric random access memory (FeRAM) device is a non-volatile semiconductor memory device, which employs the characteristics of a ferroelectric material having the residual polarity of a negative or positive direction. A structure of the ferroelectric random access memory is similar to that of a dynamic random access memory (DRAM) except that a storage element is made of the ferroelectric material.
In the FeRAM, there have been two conventional schemes in order to discriminate whether data written to a memory cell is “0” or “1”. The first conventional scheme employs a plurality of memory cells arranged in a matrix, each of which includes two transistors and two ferroelectric capacitors. The data discrimination of the first conventional scheme is accomplished by using the two ferroelectric capacitors, which are connected to a pair of bit lines, e.g. a bit line and a bit line bar, wherein one ferroelectric capacitor is connected to the bit line and the other ferroelectric capacitor is connected to the bit line bar. That is, a “1” is written to one ferroelectric capacitor and a “0” is written to the other ferroelectric capacitor.
On the other hand, a second conventional scheme employs a plurality of memory cells arranged in a matrix, each of which includes one transistor and one ferroelectric capacitor, while one column of the memory cells is provided with one reference cell having a storage element, i.e. a ferroelectric capacitor. To discriminate whether data written to a memory cell is “0” or “1”, the reference cell has the average of electric charges applied to a bit line. Accordingly, the data discrimination of the second conventional scheme is accomplished by using the reference cell, which discharges the average electric charges.
The second conventional scheme may reduce a cell area more than the first conventional scheme. However, every time each memory cell contained in the same column is selected, the corresponding reference cells should be also selected. Therefore, since operation frequency of the reference cell is greater than that of each memory cell contained in the same column, the ferroelectric capacitors of the corresponding reference cell are fatigued faster than the ferroelectric capacitor of each memory cell contained in the same column. As a result, the life span of the ferroelectric capacitor of the reference cell can be severely reduced, thereby affecting the reliance of the FeRAM.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a ferroelectric random access memory (FeRAM) that reduces operation frequency of a reference cell, thereby reducing the fatigue of a ferroelectric capacitor of the reference cell.
In accordance with an aspect of the present invention, there is provided a ferroelectric random access memory (FeRAM) device, comprising: a plurality of memory cells arranged in an M×J matrix, wherein M is a positive integer more than three and J is a positive integer; a number of reference cells connected to each column of the memory cells; and a cell selection means for selecting a memory cell in response to address signals from an external circuit and selecting a reference cell corresponding to the selected memory cell.


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