Ferroelectric random access memories (FRAMS) having lower...

Details Ferroelectric random access memories (FRAMS) having lower... Ferroelectric random access memories (FRAMS) having lower...

2008-05-20

2008-05-20

Robinson, Mark A. (Department: 4122)

Semiconductor device manufacturing: process

Having magnetic or ferroelectric component

C438S240000, C257S295000

Reexamination Certificate

active

07374953

ABSTRACT:
A ferroelectric random access memory (FRAM) includes a semiconductor substrate and an interlayer insulating layer on the substrate. A diffusion preventive layer is on the interlayer insulating layer. The diffusion preventive layer and the interlayer insulating layer have two node contact holes formed therein. Node conductive layer patterns are aligned with the node contact holes, respectively, and are disposed so as to protrude upward from the diffusion preventive layer. Lower electrodes are disposed on the diffusion preventive layer that cover the node conductive layer patterns, respectively. Thicknesses of the lower electrodes are gradually reduced from a line extending from upper surfaces of the node conductive layer patterns toward the diffusion preventive layer.

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