Ferroelectric nonvolatile random access memory utilizing self-bo

Static information storage and retrieval – Systems using particular element – Ferroelectric

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36518911, G11C 1122

Patent

active

055983669

ABSTRACT:
A ferroelectric nonvolatile random access memory array includes multiple ferroelectric memory cells arranged in rows and columns, a word line coupled to a word line input of each of the ferroelectric memory cells in a row, and a bit line coupled to a bit line input of each of the ferroelectric memory cells in a column. The array also includes multiple plate lines, each plate line being arranged into a plurality of plate line segments each coupled to a plate line input of a predetermined number of the ferroelectric memory cells in a row, and multiple NMOS plate line segment drivers coupled to each of the plate line segments for selectively driving the corresponding plate line segment to a full rail voltage. The rows of ferroelectric memory cells and the NMOS plate line segment drivers have substantially the same layout pitch. The plate line segment drivers are each coupled to a center portion of the corresponding plate line segment. Each NMOS plate line segment drivers includes a first NMOS transistor having a first current node coupled to the word line associated with the ferroelectric memory cells coupled to the plate line segment, a gate coupled to a source of supply voltage, and a second current node, and a second NMOS transistor having a first current node coupled to the plate line segment, a second current node coupled to a plate clock line, and a gate coupled to the second current node of the first NMOS transistor.

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