Ferroelectric memory to be tested by applying disturbance...

Details Ferroelectric memory to be tested by applying disturbance... Ferroelectric memory to be tested by applying disturbance...

2006-05-04

2008-08-12

Pham, Ly D (Department: 2827)

Static information storage and retrieval

Systems using particular element

Ferroelectric

C365S065000, C365S191000, C365S201000

Reexamination Certificate

active

07411809

ABSTRACT:
A unit cell is formed by a ferroelectric capacitor and first MOS transistor, and a block is formed by connecting a plurality of unit cells in series. The gates of the first MOS transistors in the individual unit cells are connected to word lines, which are selectively driven by a word line driver on the basis of a row address signal. A plate line is connected to one terminal of the block, and driven by a plate line driver. A bit line is connected to the other terminal of the block via a second MOS transistor for block selection, and selected by a column decoder on the basis of a column address. A driver/controller controls the plate line driver and column decoder to apply a potential difference between the plate line and bit line, while a plurality of word lines are kept off.

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Joseph M. Benedetto, et al., “Effects of operating conditions on the fast-decay component of the retained polarization in lead zirconate titanate thin films”, Journal Appl. Phys., vol. 75 (1), Jan. 1, 1994, pp. 460-466.

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