Ferroelectric memory devices with partitioned platelines

Static information storage and retrieval – Systems using particular element – Ferroelectric

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S117000, C365S148000, C365S149000, C365S230060

Reexamination Certificate

active

07920404

ABSTRACT:
One embodiment relates to a ferroelectric memory device. The ferroelectric memory device includes a segment of contiguous ferroelectric memory cells arranged in rows and columns. A row of ferroelectric memory cells includes a common wordline that allows access to the memory cells of the row and also includes at least two platelines associated with the row. At least one of the at least two platelines is associated with adjacent columns of ferroelectric memory cells within the row. The row of ferroelectric memory cells includes another word line which is not associated with the at least two platelines. Other methods and systems are also disclosed.

REFERENCES:
patent: 6046928 (2000-04-01), Takata
patent: 6208550 (2001-03-01), Kim
patent: 6487103 (2002-11-01), Yamamoto et al.
patent: 6493251 (2002-12-01), Hoya et al.
patent: 6510073 (2003-01-01), Lee et al.
patent: 6661697 (2003-12-01), Yamamoto et al.
patent: 6667896 (2003-12-01), Rickes et al.
patent: 6906945 (2005-06-01), Madan
patent: 6970371 (2005-11-01), Summerfelt et al.
patent: 7009864 (2006-03-01), Madan
patent: 7133304 (2006-11-01), Madan et al.
patent: 7193880 (2007-03-01), Madan et al.
patent: 2003/0031042 (2003-02-01), Yamamoto et al.
patent: 2003/0103372 (2003-06-01), Matsushita
patent: 2003/0174532 (2003-09-01), Matsushita et al.
patent: 2003/0206430 (2003-11-01), Ho
patent: 2004/0090812 (2004-05-01), Takashima
patent: 2005/0207201 (2005-09-01), Madan et al.
patent: 2006/0023484 (2006-02-01), Shiga et al.
patent: 2006/0146590 (2006-07-01), Fukushi et al.
“A Current-Based Reference-Generation Scheme for 1T-1C Ferroelectric Random-Access Memories”, Joseph Wai Kit Siu, Yadollah Eslami, Ali Sheikholeslami, P. Glenn Gulak, Toru Endo and Shoichiro Kawashima, IEEE Journal of Solid-State Circuits, vol. 38, No. 3, Mar. 2003, pp. 541-549.
“A 64 Mb Chain FeRAM with Quad-BL Architecture and 200MB/s Burst Mode”, Katsuhiko Hoya, Daisaburo Takashima, Shinichiro Shiratake, Ruy Ogiwara, Tadashi Miyakawa, Hidehiro Shiga, Sumiko M. Doumae, Sumito Ohtsuki, Yoshinori Kumura, Susumu Shuto, Tohru Ozaki, Koji Yamakawa, Iwao Kunishima, Akihiro Nitayama and Shuso Fujii, ISSCC 2006/ Session 7/ Non Volatile Memory, IEEE International Solid-State Circuits Conference, Feb. 2006, 8 pgs.
“Bitline GND Sensing Technique for Low-Voltage Operation FeRAM”, Shoichiro Kawashima, Toru Endo, Akira Yamamoto, Ken'Ichi Nakabayashi, Mitsuharu Nakazawa, Keizo Morita and Masaki Aoki, IEEE Journal of Solid-State Circuits. vol. 37, No. 5, May, 2002, pp. 592-598.
“A Survey of Circuit Innovations in Ferroelectric Random-Access Memories”, Ali Sheikholeslami and P. Glenn Gulak, Proceedings of the IEEE, vol. 88, No. 5, May 2000, pp. 667-689.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Ferroelectric memory devices with partitioned platelines does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Ferroelectric memory devices with partitioned platelines, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Ferroelectric memory devices with partitioned platelines will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2736000

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.