Ferroelectric memory device with capacitor electrode in direct c

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257310, 257751, H01L 27108, H01L 2978

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active

058669264

ABSTRACT:
A memory suitable for integration having a memory structure where at least one capacitor formed by using a ferroelectric is integrated on a semiconductor device substrate. In a unit cell structure forming the memory, an upper electrode, located at an upper position among electrodes constituting the capacitor, is directly connected to a high density diffusion layer constituting a MOS transistor.

REFERENCES:
patent: 4141022 (1979-02-01), Sigg et al.
patent: 4851895 (1989-07-01), Green et al.
patent: 5043049 (1991-08-01), Takenaka
patent: 5046043 (1991-09-01), Miller et al.
patent: 5099305 (1992-03-01), Takenaka
"Structure For Improving The Electrical Characteristics of Polysilicon Contacted n-p Junction", IBM Technical Disclosure Bulletin, vol. 31, No. 9, pp. 249-251 (Feb., 1989).

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