Ferroelectric memory device and method of reducing imprint effec

Static information storage and retrieval – Systems using particular element – Ferroelectric

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365149, G11C 1122, G11C 1124

Patent

active

059869208

ABSTRACT:
A ferroelectric memory device which is less likely to be affected with imprint effect and a highly effective method for reducing the imprint effect of the ferroelectric memory cell. A data reversing latch circuit is disposed between a pair of bit lines BL0 and /BL0 and has capacitors C1 and C2. When data is read, it is possible to store the potentials on the pair of bit lines BL0 and /BL0 as charges in the capacitors C1 and C2, and to reverse the high-low relationship between the potentials on the bit lines BL0 and /BL0 and then back to the original relationship according to stored charges in the capacitors C1 and C2. In this way, the imprint effect of the memory cell MO may be automatically reduced when data is read by reversing the data in the memory MO connected to the bit lines BL0 and /BL0 and again reversing the data back to normal.

REFERENCES:
patent: 5745403 (1998-04-01), Taylor
patent: 5835399 (1998-11-01), Jeon
patent: 5835400 (1998-11-01), Jeon et al.
patent: 5883828 (1999-03-01), Cuchiaro et al.

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