Ferroelectric memory cell arrangement having a split capacitor p

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257306, 437 52, 437 60, 437192, 437919, H01L 2978, H01L 2170, H01L 2700

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active

053507053

ABSTRACT:
A ferroelectric memory cell architecture in which a pair of cells is fabricated so as to share common elements, and wherein ferroelectric capacitors are fabricated overlying the associated select transistors, thereby achieving a small-area cell architecture. First level refractory metal interconnects formed prior to ferroelectric material deposition steps are utilized with subsequently formed second metallization layers to provide interconnections between the ferroelectric capacitor plates and the underlying transistor regions.

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