Ferroelectric memory arrangement

Details Ferroelectric memory arrangement Ferroelectric memory arrangement

2008-03-25

2008-03-25

Baumeister, B. William (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S295000

Reexamination Certificate

active

07348619

ABSTRACT:
A ferroelectric memory arrangement having memory cells, in each of which a vertical ferroelectric storage capacitor, which includes vertical electrodes and a ferroelectric dielectric between the vertical electrodes, is connected to a select transistor, the ferroelectric dielectric a plurality of ferroelectric layers, between each of which is arranged an insulating separating layer.

REFERENCES:
patent: 5155573 (1992-10-01), Abe et al.
patent: 6151240 (2000-11-01), Suzuki
patent: 6198119 (2001-03-01), Nabatame et al.
patent: 6300652 (2001-10-01), Risch et al.
patent: 6468812 (2002-10-01), Widmann et al.
patent: 6773986 (2004-08-01), Bruchhaus et al.
patent: 6858492 (2005-02-01), Bruchhaus et al.
patent: 6936880 (2005-08-01), Park
patent: 6943080 (2005-09-01), Maruyama
patent: 7041551 (2006-05-01), Zhuang et al.
patent: 7176509 (2007-02-01), Maruyama et al.
patent: 7199002 (2007-04-01), Hornik et al.
patent: 2003/0151078 (2003-08-01), Tanaka et al.
patent: 2005/0084984 (2005-04-01), Zhuang et al.
patent: 2006/0046317 (2006-03-01), Bruchhaus et al.
patent: 1 383 162 (2004-01-01), None

Affiliated with

Also associated with

Rating

Ferroelectric memory arrangement does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Ferroelectric memory arrangement, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Ferroelectric memory arrangement will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2784673