Ferroelectric memory and method of reading the same

Details Ferroelectric memory and method of reading the same Ferroelectric memory and method of reading the same

2001-12-21

2003-11-11

Elms, Richard (Department: 2824)

Static information storage and retrieval

Systems using particular element

Ferroelectric

C365S117000, C365S203000, C365S204000

Reexamination Certificate

active

06646904

ABSTRACT:

BACKGROUND
The present invention relates generally to electronic memory and, more particularly, to a method of reading a ferroelectric cell of a ferroelectric memory array.
Exemplary known semiconductor memory include dynamic random access memory (DRAM), static random access memory (SRAM), electrically programmable read only memory (EPROM), flash memory, and ferromagnetic semiconductor memory devices. SRAM and DRAM devices are volatile, and require continuous power for data retention. When power is removed from these volatile devices, data is lost.
Unlike the volatile devices, nonvolatile memory can provide data retention in the absence of power. Exemplary known nonvolatile memory include the magneto-resistive, ferro-magnetic, and ferroelectric memory devices. Recently, manufacturers of nonvolatile memory have been working to improve ferroelectric memory.
Referencing
FIGS. 1 and 2
, an exemplary known ferroelectric cell
10
comprises ferroelectric material
16
sandwiched between first and second electrodes
12
,
14
, such as, for example, wordline
20
and bitline
22
of a known ferroelectric memory array. The spontaneous polarization P
s
vector characterizes an alignment of domains of the ferroelectric material as influenced by an electric field. Upon removal of the electric field, a remanent polarization P
r
remains. Applying a switching level electric field of opposite polarity reverses the polarization orientation.
The polarization versus voltage properties of an exemplary ferroelectric cell are characterized by hysteresis curve
24
of FIG.
3
. The hysteresis curve crosses vertical axis
28
at two locations
21
,
23
representative of the remanent polarizations associated with the “0” (zero) and “1” (one) state storage conditions. For an ideal curve, the remanent polarization P
r
under zero bias at position
21
would have a magnitude equal to that of the saturation polarization P
s
at bias position
25
. However, it is understood that some domains of the ferroelectric do not remain aligned when the applied voltage bias is reduced, e.g., from the saturation level V
s
to zero. Accordingly, the magnitude of the remanent polarization P
r
is less than that of its saturation polarization P
s
.
Further referencing
FIGS. 2-3
, by applying a negative voltage −V
s
to wordline
20
relative to bitline
22
, the cell's polarization is set to its negative orientation (following path
34
of curve
24
to position
27
) for storing a “one” state condition. Upon removing the applied voltage, the cell's negative polarization remains (path
36
to remanent position
23
). Thereafter, applying a positive voltage V
s
reverses the cell's polarization state, which “one” to “zero” polarization reversal is accompanied by an associated charge release. In contrast, a cell of a zero state would not provide such charge release with application of positive V
s
. This difference in the released charge between the “one” and “zero” states provides the fundamental principle to read a ferroelectric cell.
Ferroelectrics also exhibit resilience, wherein a ferroelectric cell can restore a remanent polarization despite a small disturbance. For example, assuming a one state storage condition for a ferroelectric cell, as represented by remanent polarization position
23
of hysteresis curve
24
, a small voltage disturbance of V
s
/3 provides a small polarization shift
40
along path
38
. However, once the voltage is removed, domains of the ferroelectric cell realign their orientations to that of the cell's overall orientation, as illustrated by return path
39
of hysteresis curve
24
.


REFERENCES:
patent: 5835400 (1998-11-01), Jeon et al.
patent: 2002/0024835 (2002-02-01), Thompson et al.
patent: 2002/0060923 (2002-05-01), Thompson et al.
patent: 2003/0021143 (2003-01-01), Nair

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