Ferroelectric memory and method of driving the same

Details Ferroelectric memory and method of driving the same Ferroelectric memory and method of driving the same

2008-04-29

2008-04-29

Zarabian, Amir (Department: 2827)

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

C365S145000

Reexamination Certificate

active

07366035

ABSTRACT:
A ferroelectric memory includes: a memory cell array in which a plurality of memory cells are disposed, a plurality of wordlines, a plurality of platelines, and a plurality of wordline driver circuits, each of the memory cells including a ferroelectric capacitor. A wordline driver circuit circuits includes: a driver DRV which drives a wordline WL; a transfer transistor TRA provided between the driver DRV and the wordline WL; and a gate control circuit. The gate control circuit performs gate control which causes the transfer transistor TRA to be turned on, and performs gate control which causes the transfer transistor TRA to be turned off, before a voltage of the wordline WL is boosted (before a plateline PL is driven) after the transfer transistor TRA has been turned on.

REFERENCES:
patent: 6430093 (2002-08-01), Eliason et al.
patent: 6667896 (2003-12-01), Rickes et al.
patent: 6912175 (2005-06-01), Noro
patent: 7085190 (2006-08-01), Worley et al.
patent: 2001-283583 (2001-10-01), None

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