Ferroelectric memory and method for reading data from the...

Static information storage and retrieval – Systems using particular element – Ferroelectric

Reexamination Certificate

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C365S065000, C365S189090, C365S203000, C365S207000

Reexamination Certificate

active

11132196

ABSTRACT:
A ferroelectric memory of the present invention comprises: a plurality of normal cells, each of which includes a first ferroelectric capacitor for holding data and a first transistor connected to a first electrode of the first ferroelectric capacitor; a first bit line connected to the first transistor; a first bit line precharge circuit which is a switch circuit provided between the first bit line and a ground; and a word line connected to a gate of the first transistor. The word line is deactivated to disconnect the first ferroelectric capacitor from the first bit line before the first bit line precharge circuit is driven to discharge a potential of the first bit line.

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Y. Chung et al., “A 3.3-V 4-Mb Nonvolatile Ferroelectric RAM with a Selectively-Driven Double-Pulsed Plate Read/Write-Back Scheme”, Symposium on VLSI Circuits Digest, Jun. 1999, pp. 97-98.

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