Ferroelectric memory

Static information storage and retrieval – Systems using particular element – Ferroelectric

Patent

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Details

365236, G11C 1122

Patent

active

060785160

ABSTRACT:
A memory device has a ferroelectric memory cell block, which is connected via an input/output latch buffer to a data input terminal. The memory device also has a writing period forming circuit that forms a predetermined number of writing periods when writing of data is requested. During the thus formed plurality of writing periods, a control circuit controls the input/output latch buffer to write data to the memory cell block. Thus, a single request for writing of data causes writing of data to be repeated a plurality of times automatically.

REFERENCES:
patent: 5815430 (1998-09-01), Verhaeghe et al.

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