Ferroelectric memory

Static information storage and retrieval – Systems using particular element – Ferroelectric

Reexamination Certificate

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C365S203000, C365S189011

Reexamination Certificate

active

11188104

ABSTRACT:
For a predetermined period from the start of a read operation, an electric current is fed to bit lines connected with memory cells so that ferroelectric capacitors of the memory cells are charged. The voltage change of the bit lines are different according to the logic values of data stored in the ferroelectric capacitors. Therefore, the logic value stored in the memory cells can be detected as a time difference. Even if the voltage change of the bit lines is small, the time difference can be reliably generated. Even in case the residual dielectric polarization value of the ferroelectric capacitor is low, therefore, the data can be reliably read from the memory cells. In short, the read margin of data can be better improved than in the case where the logic value of data is detected with a voltage difference.

REFERENCES:
patent: 6038161 (2000-03-01), Fuchikami
patent: 6525956 (2003-02-01), Murakuki
patent: 6914839 (2005-07-01), Chow et al.
patent: 6924997 (2005-08-01), Chen et al.
patent: 11-185465 (1999-07-01), None
patent: 2002-32984 (2002-01-01), None
patent: 2002-157876 (2002-05-01), None
Eslami et al., “A Differential-Capacitance Read Scheme for FeRAMs”, 2002 Symposium on VLSI Circuits Digest of Technical Papers, 15-13, pp. 298-301 (Jun. 2002).

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