Ferroelectric latch

Static information storage and retrieval – Systems using particular element – Ferroelectric

Reexamination Certificate

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Details

C365S154000

Reexamination Certificate

active

06947310

ABSTRACT:
Ferroelectric latch type memory devices (102) are provided, comprising an input circuit (110) with first and second internal nodes (N1, N2) coupled with first and second ferroelectric capacitors (CFE1, CFE2), a control circuit (120), a restore circuit (130), and an output circuit (140). The input circuit (110) operates in a first mode to provide the input data state as first and second voltages on the first and second internal nodes (N1, N2), respectively. In a second mode, the input circuit (110) allows the internal nodes (N1, N2) to float, the restore circuit (130) operates to restore the data state from the ferroelectric capacitors (CFE1, CFE2) to the internal nodes (N1, N2), and the output circuit (140) provides a restored data state as an output (OUT).

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