Ferroelectric data processing device

Details Ferroelectric data processing device Ferroelectric data processing device

2001-10-17

2002-12-24

Lam, David (Department: 2818)

Static information storage and retrieval

Systems using particular element

Ferroelectric

C365S065000

Reexamination Certificate

active

06498744

ABSTRACT:

The present invention concerns a ferroelectric data-processing device, particularly for processing and/or storage of data with active or passive electrical addressing, comprising a data-carrying medium in the form of a thin film of ferroelectric material, wherein the ferroelectric material by an applied electric field may attain a first or a second polarization state by being switched from a disordered state to one of the polarization states or from the first to the second polarization state or vice versa, wherein the ferroelectric material comprises logic elements, wherein a polarization state assigned to a logic element represents a logical value of the logic element, wherein the ferroelectric thin film is provided as a continuous or patterned layer, wherein a first and second electrode structure each comprises substantially mutually parallel strip-like electrodes, such that the electrode structures mutually form a substantially orthogonal x,y matrix, wherein the electrodes in the first electrode structure constitute the columns of the electrode matrix or the x electrodes and the electrodes in the second electrode structure the rows of the electrode matrix or y electrodes, wherein a portion of the ferroelectric thin film at the overlap between an x electrode and a y electrode of the electrode matrix forms a logic element such that the logic elements jointly form an electrically connected passive matrix in the data-processing device.
The present invention also concerns a method for manufacturing the ferroelectric data-processing device, as well as a method for readout in the addressing of logic elements in a ferroelectric data-processing device, particularly a ferroelectric data-processing device according to claims 1-9, wherein the method supports a protocol for readout and comprises steps for respectively reading, verification and reset. Finally the invention concerns the use of a ferroelectric data-processing device according to the invention.
Generally the invention concerns data-processing devices with logic elements implemented in a ferroelectric material. The phenomena of ferroelectricity is in this connection supposed known by persons skilled in the art, as the field is comprehensively treated in the literature, for instance in J. M. Herbert, Ferroelectric Transducers and Sensors, Gordon and Breach, 1982, wherein in pp. 126-130 there is proposed using a ferroelectric memory based on single crystals of barium titanate provided between orthogonal electrodes in an x,y electrode matrix. The author concludes that there are substantial practical difficulties connected with the use of ferroelectric single crystals for information storage in this simple manner. In regard of recent survey literature, reference may be made to R. G. Kepler and R. A. Anderson, Advances in Physics, Vol. 41, No. 1, pp. 1-57 (1992).
To illustrate the development of ferroelectric memories in a historical context, reference may be made to a paper by W. J. Merz and J. R. Anderson titled “Ferroelectric Storage Devices”, which was published in September 1955 (Bell Lab. Records, 1:335-342 (1955)) which discloses the use of inorganic ferroelectric crystalline materials, particularly barium titanate in, in memory and switching devices. Particularly they suggest a ferroelectric memory device based on this material, the latter being provided as a planar 50-100 &mgr;m thick slab between overlapping sets of parallel electrodes, one set of the electrodes being orthogonal to the electrodes of the other and thus providing ferroelectric memory cells in portions of the ferroelectric material between the overlapping electrodes. Thus they disclose a ferroelectric device with a passive electrode matrix for addressing (see FIG. 10 of their paper), anticipating the general layout of all later ferroelectric memory devices with matrix-based addressing. They even hint at the use of transistors for switching, but forming an active memory cell with a switching transistor and with sufficiently small dimension would hardly be practical before the advent of say integrated field effect transistors.
As mentioned above, the data-processing medium is a ferroelectric material in the form of thin film. Such ferroelectric thin films which either may be inorganic, ceramic materials, polymers or liquid crystals have been known for some time and it may in this connection be referred to the above-mentioned article by Kepler and Anderson. There are for instance from J. F. Scott, Ferroelectric memories, Physics World, February 1995, pp. 46-50, known data storage devices based on ferroelectric memory materials. They all have in common that at least one transistor is necessary in each bit location or memory cell. In the most common embodiments the ferroelectric material is used as a dielectric in the associated memory circuit and comprises a bit-storing capacitor. Due to the high dielectric constant of ferroelectric materials, the capacitor may be made much smaller than otherwise possible and will additionally provide a quite superior charge lifetime. Recently the development has focused on another property of ferroelectric materials, namely their ability to be polarized electrically when they briefly are subjected to a strong electric field. During the polarization process the dipoles of the ferroelectric material attain a preferred orientation, something which results in a macroscopic dipole moment which is retained after the removal of the polarizing field. By thus including the ferroelectric material in the gate electrode structure of a field effect transistor in the memory cell circuit, the transconductance characteristics of the transistors may be controlled by controlling the polarization state of the ferroelectric material. The latter may be switched, for instance by polarizing fields with a direction which either causes a transconductant state “on” or “off” in the transistor.
EP patent 0 721 189 discloses a ferroelectric memory with discrete memory cells provided in an electrode matrix. In addition to a discrete ferroelectric capacitor each memory cell also comprises switching means, preferably in the form of at least one transistor. The discrete memory cells hence do not form a passive matrix. With discrete memory cells it shall here be understood that the ferroelectric capacitor is formed by a discrete component, such that the ferroelectric material cannot form a continuous layer in the matrix. There are provided separate data and selection lines and the readout of a stored datum may take place in current or voltage mode on data lines provided for this purpose, but according to a relatively complicated protocol, such as disclosed by patent claim 6. It must also be remarked that the number of memory cells connected in a data signal line must be adjusted in order to accommodate parasitic capacitance on each data signal line during the readout, such that the voltage variation on one of the data signal lines is minimized.
U.S. Pat. No. 5,592,409 concerns a non-volatile ferroelectric memory wherein data may be read out without destruction. The memory cells are included in an active matrix and are formed as transistor structures therein, wherein the gate electrode forms one of the electrodes in a ferroelectric capacitor. It is evident that the ferroelectric capacitors are discrete components. The polarization of the capacitor takes place in a well-known manner, but by the readout which takes place in current mode it is the drain current that is detected, this in order to prevent the stored data from being erased.
Even if the use of ferroelectric materials as mentioned above represents substantial improvements relative to alternative technologies for storage of data, the basic architecture of ferroelectrically based memories is directed to the use of active microcircuits included in each memory cell. This has negative consequences for the achievable data storage density, i.e. the number of bits which may be stored on a given surface area, as well as for the cost of each bit stored, something which partly may be due to complicated manufact

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