Ferroelectric capacitor and semiconductor device having a...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S296000, C257S303000, C257S306000, C257S307000, C257S308000, C257S309000, C257S310000

Reexamination Certificate

active

07151289

ABSTRACT:
A ferroelectric capacitor including a bottom electrode which has a projecting portion, a top electrode, a ferroelectric layer and a dielectric layer formed between the bottom electrode and the top electrode. The dielectric layer is formed on a peripheral area of the bottom electrode. The ferroelectric layer is formed on the dielectric layer and on the projecting portion of the bottom electrode. As a result, a damaged layer which is formed during an etching process occurs at the ineffective area of the ferroelectric capacitor.

REFERENCES:
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patent: 5708284 (1998-01-01), Onishi
patent: 6043526 (2000-03-01), Ochiai
patent: 6093575 (2000-07-01), Eguchi
patent: 6444478 (2002-09-01), Basceri et al.
patent: 6459111 (2002-10-01), Natori et al.
patent: 6495879 (2002-12-01), Kobayashi
patent: 11-214626 (1999-08-01), None
patent: 2001-308287 (2001-11-01), None
S.Y. Lee et al., “A FRAM technology using ITIC and triple metal layers for high performance and high density FRAMs”, 1999 Symposium on VLSI Technology Digest of Technical Papers, pp. 141-142.

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