Ferroelectric capacitor and memory cell including barrier and is

Details Ferroelectric capacitor and memory cell including barrier and is Ferroelectric capacitor and memory cell including barrier and is

1987-10-08

1991-09-03

Gossage, Glenn

Static information storage and retrieval

Systems using particular element

Ferroelectric

365 65, 365149, 357 236, 361301, 361321, G11C 1122

Patent

active

050460439

ABSTRACT:
A ferroelectric capacitor structure is designed for fabrication together with MOS devices on a semiconductor substrate. The ferroelectric capacitor includes a diffusion barrier layer above the surface of the substrate for preventing the materials of the ferroelectric capcacitor from contaminating the substrate or MOS devices. The ferroelectric capacitor comprises a bottom electrode, a thin film ferroelectric layer and a top electrode. An interlayer dielectric is formed to cover portions of the ferroelectric thin film and provide an opening therethrough for the top electrode. A ferroelectric memory cell comprises a field effect transistor together with a ferroelectric capacitor fabricated on a semiconductor substrate. In one configuration, the ferroelectric capacitor is offset from the field effect transistor, while in another configuration, the ferroelectric capacitor is substantially above the field effect transistor to provide greater density.

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Arnett, "Ferroelectric Fet Device", IBM Technical Disclosure Bulletin, vol. 15, No. 9, Feb. 1973, p. 28225.
"Sol-Gel Processing of PbTiO.sub.3, PbZrO.sub.3, PZT, PLZT thin films", Brit. Cer. Proc., vol. 36, 1985, pp. 107-212.
"Preparation of Ferroelectric PZT Films by Thermodecomposition of Organometallic Compounds", Journal of Material Science, vol. 19, 1984, pp. 595-598.
"Principles and Applications of Ferroelectrics", M. E. Lines & A. A. Glass, Oxford Press 1977, v-vii, 559-561, 579.

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