Static information storage and retrieval – Systems using particular element – Ferroelectric
Reexamination Certificate
2002-07-01
2004-03-09
Lebentritt, Michael S. (Department: 2824)
Static information storage and retrieval
Systems using particular element
Ferroelectric
C365S149000, C365S173000
Reexamination Certificate
active
06704219
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the invention
The invention relates to a FeRAM memory and a method for manufacturing it.
When modern semiconductor memory devices are manufactured, in particular, when FeRAM memories or the like are manufactured, a semiconductor substrate or the like, a passivation region and/or a surface region thereof are formed with a CMOS structure that forms the underlying circuit configuration of the semiconductor memory device. A capacitor configuration with a multiplicity of capacitor devices that are used as storage elements is formed in the region of the semiconductor substrate or the like, a passivation region and/or a surface region thereof.
In such prior art manufacturing methods, an objective is to realize an integration density that is as high and wide-ranging as possible during the processing of the corresponding semiconductor memories.
Conventional semiconductor memory devices that use capacitor devices as storage elements are limited with respect to the integration density to the extent that the capacitor devices used for their method of functioning as storage capacitors or storage elements must not drop below a certain minimum size, and, thus, a minimum extent. Therefore, even with the minimum space in between conventional capacitor devices, there is automatically a limit on the surface density of storage elements, which cannot be undershot.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a FeRAM memory and method for manufacturing a FeRAM memory that overcome the hereinafore-mentioned disadvantages of the heretofore-known devices and methods of this general type and that achieves a particularly high storage density with simultaneous functional reliability.
With the foregoing and other objects in view, there is provided, in accordance with the invention, a FeRAM memory, including at least one of a semiconductor substrate, a passivation region and a surface region formed with a CMOS structure, and a capacitor configuration having a multiplicity of capacitor devices used as storage elements disposed in a region of the at least one of the semiconductor substrate, the passivation region, and the surface region, at least some of the capacitor devices being formed with a multiplicity of individual capacitors connected in parallel with one another, the individual capacitors having one of ferroelectric and paraelectric dielectric regions with different coercitive voltages to provide each of the capacitor devices with a multiplicity of storage states.
In the FeRAM memory according to the invention, a semiconductor substrate, a passivation region, and/or a surface region thereof are formed with a CMOS structure. In the region of the semiconductor substrate, the passivation region and/or the surface region, a capacitor configuration of a multiplicity of capacitor devices that are used as storage elements is formed. At least some of the capacitor devices are formed with a multiplicity of individual capacitors that are connected in parallel with one another. The individual capacitors are formed with ferroelectric or paraelectric dielectric regions with different coercitive voltages, resulting in a multiplicity of storage states with each capacitor device.
A first electrode device, a second electrode device, and a dielectric provided between them are advantageously formed for each capacitor device.
It is also advantageous that at least some of the first and/or second electrode devices are formed with a multiplicity of electrodes that are respectively electrically connected to one another, and that, as a result, a multiplicity of individual capacitors that are connected in parallel with one another are formed.
It is also advantageous that at least some of the respective multiplicity of electrodes that are connected to one another are identified with one another, in particular, as an electrically conductive one-part or one-piece region.
In accordance with another feature of the invention, at least some of the capacitor devices are in contact by their respective first electrode device, through a first contact element, with the first electrode device of a first directly spatially adjacent capacitor device, and by a second electrode device, through a second contact element, with the second electrode device of a second directly spatially adjacent capacitor device of the capacitor configuration, to form a capacitor configuration with at least a partially connected or chain structure. It is also advantageous that at least some of the capacitor devices are constructed in the form of a stack structure.
With the objects of the invention in view, there is also provided a method for manufacturing a FeRAM memory, the steps of forming at least one of a semiconductor substrate, a passivation region, and a surface region with a CMOS structure, and forming a capacitor configuration of a multiplicity of capacitor devices used as storage elements in a region of the at least one of the semiconductor substrate, the passivation region, and the surface region, at least some of the capacitor devices being formed with a multiplicity of individual capacitors connected in parallel with one another, the individual capacitors being formed with one of ferroelectric and paraelectric dielectric regions with different coercitive voltages, and, as a result, each capacitor device is formed with a multiplicity of storage states.
In comparison with the method mentioned at the beginning for manufacturing a semiconductor memory device, and, in particular, a FeRAM memory or the like, the method-related solution according to the invention is further defined in that at least some of the capacitor devices are formed with a multiplicity of individual capacitors that are connected in parallel with one another. The individual capacitors are formed with ferroelectric or paraelectric dielectric regions with different coercitive voltages, resulting in a multiplicity of storage states in each capacitor device.
A fundamental aspect of the present invention is, thus, to form, instead of a single individual capacitor with electrode devices, opposite one another, for each capacitor device that is to serve as a storage element, a multiplicity of individual capacitors that are substantially connected in parallel. Using a multiplicity of individual capacitors for each capacitor device provides the possibility of a flexible configuration of these individual capacitors so that it is possible specifically to take account of the aspect of increasing the integration density. Thus, the individual capacitors of the capacitor devices can be formed and disposed such that while the function is still reliable, a minimum amount of space is required in the storage element. The minimum capacity that is necessary overall for the method of functioning is, thus, distributed in terms of areas over the multiplicity of individual capacitors that are connected in parallel.
A first electrode device, a second electrode device, and a dielectric that is substantially formed between them are provided for each of the capacitor devices.
To realize the multiplicity of individual capacitors, there is provision, in accordance with a further mode of the invention, at least a part of the first and/or second electrode device is formed with a multiplicity of electrodes that are respectively electrically connected to one another to form the multiplicity of individual capacitors that are connected in parallel with one another.
In accordance with an added mode of the invention, for manufacturing a semiconductor memory device according to the invention, at least some of the respective multiplicity of electrodes that are connected to one another are formed so that they are identified with one another, in particular, as an electrically conductive one-part and/or one-piece region or the like. Thus, it is possible, for example, advantageously to provide that one and the same electrically conductive region forms, with one surface area, one electrode, and with another surface area, another electrode of the multiplicity
Bruchhaus Rainer
Enders Gerhard
Hartner Walter
Krönke Matthias
Mikolajick Thomas
Greenberg Laurence A.
Infineon - Technologies AG
Lebentritt Michael S.
Locher Ralph E.
Nguyen Hien
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