FeRAM having common main bit line

Details FeRAM having common main bit line FeRAM having common main bit line

2006-11-21

2006-11-21

Lam, David (Department: 2827)

Static information storage and retrieval

Systems using particular element

Ferroelectric

C365S196000, C365S210130

Reexamination Certificate

active

07139185

ABSTRACT:
A nonvolatile ferroelectric memory device has an improved cell array structure where one main bit line is connected in common to a plurality of sub bit lines, thereby reducing the layout area of the memory and facilitating the process. The nonvolatile ferroelectric memory device having a common main bit line comprises a plurality of cell array blocks, a plurality of sense amplifiers, a main amplifier unit, and a data bus unit. The plurality of cell array blocks, which include main bit lines shared by a plurality of sub bit lines each adjacent left and right to the main bit line, induce a sensing voltage of the main bit line depending on a voltage applied to the plurality of sub bit lines by cell data.

REFERENCES:
patent: 6272594 (2001-08-01), Gupta et al.
patent: 6363439 (2002-03-01), Battles et al.
patent: 6594174 (2003-07-01), Choi et al.
patent: 2001-028427 (2001-01-01), None

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