Feedback circuit for line load compensation and reflection...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction

Reexamination Certificate

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C326S050000

Reexamination Certificate

active

07489158

ABSTRACT:
Line load compensation and reflection reduction in a signal transmitting circuit is provided using feedback capacitors. The feedback capacitor serially coupled with a resistance generates an RC rise/fall time that is independent of the line load. Additionally, by selecting a capacitor that yields a rise/fall time of approximately ⅓ of the maximum bit transmission time, signal reflection on the signal line can be reduced. Accordingly, by incorporating the feedback capacitor with a differential drive circuit, such as the IB485driver, variations in line load can be compensated for while also reducing signal reflection due to un-terminated or improperly terminated signal lines, thus allowing a free topology implementation.

REFERENCES:
patent: 3629692 (1971-12-01), Goyer
patent: 6172541 (2001-01-01), Young et al.
patent: 6275092 (2001-08-01), Maggio et al.
patent: 6362678 (2002-03-01), Bosnyak et al.
patent: 6819168 (2004-11-01), Brewer
Sedra et al. “Microelectronics Circuits: Fifth Edition” Oxford University Press (C) 2004. pp. 256-257, 546-555, 557-559, and 562-571.
Sedra et al. “Microelectronics Circuits: Fifth Edition” Oxford University Press (C) 2004, pp. 256-257, 546-555, 557-559, and 562-57.

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