Fault-tolerant multiprocessor system

Details Fault-tolerant multiprocessor system Fault-tolerant multiprocessor system

1987-05-19

1989-03-28

Chan, Eddie P.

Excavating

371 62, 364200, G06F 1120

Patent

active

048170917

ABSTRACT:
In a multiprocessor system interconnected by a bus structure that provides communication and information transfers between the processor modules of the system, each processor broadcasts a central message to all the other processors of the system on a periodic basis. A processor module not receiving the control message from a sending processor module will assume the sending processor module has failed, and operate to take over the task of the failed processor module.

REFERENCES:
patent: 3623014 (1971-11-01), Doetz
patent: 3749897 (1973-07-01), Hirvela
patent: 3786433 (1974-01-01), Notley et al.
patent: 3908099 (1975-09-01), Boulas et al.
patent: 3919533 (1975-11-01), Einolf, Jr. et al.
patent: 3921141 (1975-11-01), Wilber et al.
patent: 4012717 (1977-03-01), Censier et al.
patent: 4099241 (1978-07-01), Ossfeldt

Affiliated with

Also associated with

Rating

Fault-tolerant multiprocessor system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Fault-tolerant multiprocessor system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fault-tolerant multiprocessor system will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1665665