Fault-tolerant digital communications channel having...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Protocol

Reexamination Certificate

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C710S104000, C710S107000, C710S240000, C375S219000, C375S356000, C375S371000, C375S376000, C370S453000, C370S458000, C709S231000, C327S155000, C198S836400

Reexamination Certificate

active

07073001

ABSTRACT:
A method of synchronizing or initiating channel lock in a serial loop formed by an initializing transceiver and subject transceivers disclosed. Should a transceiver in the serial loop detect that its receiving serial channel is desynchronized, it sends an unlock signal to the next transceiver in the loop. The unlock signal guarantees that the next transceiver's receiving serial channel will be desynchronized. Only the initializing transceiver may initiate a channel lock sequence.

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patent: 6426984 (2002-07-01), Perino et al.
patent: 6839393 (2005-01-01), Sidiropoulos
patent: 6861884 (2005-03-01), Nguyen et al.

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