Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Patent
1997-09-22
1999-03-23
Swann, Tod R.
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
711170, 711171, 711172, 711173, 711153, 711161, 711162, 39518203, 39518204, 39518205, G06F 1200
Patent
active
058872701
ABSTRACT:
Data is recovered despite a single point of failure in a data exchanging system while accommodating scaleable data transfer rate performance. In the environment of at least two disk array controllers, a serial dumping scheme assists in recovery of data from a fast memory. It is imperative to avoid loss of write data from a host computer which is received and acknowledged but not yet stored in a disk medium. The configuration ensures that at least one of the controllers will handle the data so as to correct single failure point errors and properly store that data on one of the disks of an array. A fast memory providing a buffer between a remote host computer and arrays of data storage media is managed so that data received for writing is duplicated for reliability of storage while data for reading to the host computer is manipulated with an enhanced bandwidth of fast memory operation.
REFERENCES:
patent: 4527271 (1985-07-01), Hallee et al.
patent: 4607330 (1986-08-01), McMurray et al.
patent: 4672529 (1987-06-01), Kupersmit
patent: 4796232 (1989-01-01), House
patent: 4958351 (1990-09-01), Flora et al.
patent: 5140592 (1992-08-01), Idleman et al.
patent: 5148432 (1992-09-01), Gorden et al.
patent: 5155845 (1992-10-01), Beal et al.
patent: 5185693 (1993-02-01), Loftis et al.
patent: 5197148 (1993-03-01), Blount et al.
patent: 5204963 (1993-04-01), Noya et al.
patent: 5208813 (1993-05-01), Stallmo
patent: 5235601 (1993-08-01), Stallmo
patent: 5235700 (1993-08-01), Alaiwan et al.
patent: 5239646 (1993-08-01), Kimura
patent: 5274645 (1993-12-01), Idleman et al.
patent: 5274799 (1993-12-01), Brant et al.
patent: 5283879 (1994-02-01), Carteau et al.
patent: 5289589 (1994-02-01), Bingham et al.
patent: 5325363 (1994-06-01), Lui
patent: 5379417 (1995-01-01), Lui et al.
patent: 5390187 (1995-02-01), Stallmo
patent: 5398253 (1995-03-01), Gordon
patent: 5432922 (1995-07-01), Polyzois et al.
patent: 5434997 (1995-07-01), Landry et al.
patent: 5438549 (1995-08-01), Levy
patent: 5469566 (1995-11-01), Hohenstein et al.
patent: 5499377 (1996-03-01), Gordon
patent: 5504882 (1996-04-01), Chai et al.
patent: 5524203 (1996-06-01), Abe
patent: 5548711 (1996-08-01), Brant et al.
patent: B14965717 (1990-10-01), Cutts, Jr. et al.
Brant William Alexander
Howard Gary Ward
Nielson Michael Edward
EMC Corporation
Kubida, Esq. William J.
Namazi Mehdi
Swann Tod R.
LandOfFree
Fault tolerant controller system and method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Fault tolerant controller system and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fault tolerant controller system and method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2137220