Fault-tolerant architecture for in-circuit programming

Details Fault-tolerant architecture for in-circuit programming Fault-tolerant architecture for in-circuit programming

2007-06-26

2007-06-26

Bonzo, Bryce P. (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

Reexamination Certificate

active

10408591

ABSTRACT:
The present invention provides a method and apparatus for providing fault-tolerance for in-circuit programming systems. The invention operates by storing a minimal set of code to initialize the in-circuit programming process in a protected memory so that if the in-circuit programming process fails, the in-circuit programming process can be restarted from the protected memory. This type of fault-tolerance is especially important in systems which allow the code which accomplishes the in-circuit programming to be modified by the in-circuit programming process. One embodiment of the present invention provides a multiplexer to selectively switch between a normal boot code sequence and a protected boot code sequence, as well as a watchdog timer to monitor the in-circuit programming process to determine whether the in-circuit programming process is not progressing properly.

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