Fault detection in a redundant power converter

Details Fault detection in a redundant power converter Fault detection in a redundant power converter

1998-10-28

2001-08-14

Ray, Gopal C. (Department: 2181)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C713S300000, C307S082000, C363S071000

Reexamination Certificate

active

06275958

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to redundant power converters, and more particularly, to detecting a fault condition in a redundant power converter.
BACKGROUND OF THE INVENTION
Voltage regulator devices typically maintain terminal voltages of voltage sources within required limits despite variations in input voltages or loads. Industry standard voltage regulators, also known as DC/DC converters, are generally not fault tolerant, thus the output of the regulator goes out of regulation during a fault. Most of the point-of-load power converters in server systems, like the voltage regulator modules (VRMs) for Intel processors, are of the same topology: non-isolated, step-down (buck) converters with synchronous rectification. A basic schematic diagram of a standard buck converter is illustrated in FIG.
1
. The distinguishing feature of a synchronous buck converter is that a lower switch S
2
is implemented by a diode
10
in parallel with a field effect transistor (FET)
12
. In some designs, the body diode of the MOSFET is used for the function of a discrete diode
10
. In this case an open circuit, say due to a wire bond failure would also be detected. Switch S
2
and another switch S
1
, formed by a FET
14
, are controlled in a complimentary fashion, such that either one or the other switch, but not both switches, is ON, except for a small ‘dead-time’ when only the diode
10
conducts. Efficiency is achieved by the arrangement, because the losses of existing FET devices are generally better than those of existing diode devices. The arrangement further allows current to flow through S
2
in reverse, and thus synchronous converters can regulate down to zero DC load.
Many converters, such as that in
FIG. 1
, also use a control scheme called ‘current-mode’ control, where output current is sensed through a resistor
16
(R
1
), which is normally in the range of 3 to 10 milliohms. The resulting information is then used to help control the converter and the output voltage feedback via control unit
18
. A clock signal, CLOCK, in the control unit
18
sets the switching frequency and is the basis of timing inside the converter. The base period of the switching, Tclock, results from the clock signal. A switching node, V
1
, acts as a summing point of switches S
1
, S
2
, and inductor L
1
. Under normal operations, the voltage at V
1
has a rising edge synchronized, except for propagation delays, with the clock signal and a falling edge set by the control unit
18
. Excluding losses, during DC conditions, the period that the signal at V
1
is on, Ton,=Tclock (Vout/Vin). The rectangular waveform resulting at V
1
is then chopped down by a filter formed by the inductor
19
(L
1
) and a capacitor
21
(C
1
). In order to keep the output voltage ripple at low levels required by a load device, e.g., a CPU (central processing unit), the corner frequency of the L
1
-C
1
filter is virtually always kept at least 10 times lower in frequency than the frequency of the clock signal.
Faults in a voltage regulator can be problematic and are usually not detected until the regulator goes out of tolerance as detected by a fault detection device coupled to the output of the regulator. “Up-time” is becoming increasingly important in servers as the servers take on tasks once performed by ultra-reliable mainframes. Redundancy is the typical method used to achieve a high degree of basic reliability in servers.
FIG. 2
illustrates a plurality of redundant voltage regulator modules
20
, VRM
1
to VRMn, which are coupled in parallel to a sensitive load device
22
, e.g., a CPU, such that if one VRM
20
goes down, another VRM takes over. Without fault detection hooks to sense failures in redundant elements and a way in which to report them, however, redundancy is significantly less useful.
Isolating faults is also problematic. Prior art approaches typically use a diode on the output of the converter in order to provide a means to isolate parallel converters for fault tolerance reasons. Due to their finite voltage drop, “OR-ing” diodes to isolate a faulted converter significantly decreases the efficiency of the system. Further, the diodes make it nearly impossible to meet stringent dynamic load performance requirements of certain specifications, e.g., Intel specifications. Simply tieing the converters together offers one possible alternative approach, but the overall reliability actually decreases under such circumstances, since many faults in one converter may cause either an overcurrent or overvoltage condition, which brings down the entire system of parallel converters. While replacing the diode on the output with a semiconductor switch, such as a power MOSFET, has been attempted, the problems of the OR-ing of the diodes remain, albeit in a somewhat diminished capacity.
Accordingly, what is needed is a method and system for detecting faults in a redundant power converter, e.g., voltage regulator module, before the output voltage goes out of regulation.
SUMMARY OF THE INVENTION
The present invention provides aspects for sensing faults in a redundant power converter. An exemplary circuit aspect includes a signal transition monitor for monitoring signal transitions at a predetermined node within the redundant power converter, and a detector for detecting a fault condition in the redundant power converter when a proper signal transition fails to occur during a base period of switching.
Through the present invention, faults are capably sensed in a manner that allows a faulted converter to be replaced during a scheduled period of down time to thus achieve restoration without having an unscheduled outage. These and other advantages of the aspects of the present invention will be more fully understood in conjunction with the following detailed description and accompanying drawings.


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