Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-07-05
2005-07-05
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06915494
ABSTRACT:
A fault analyzing system presumes fault propagation paths for specifying nodes related to fault terminals once on plural time planes, and merges pieces of related fault terminal information representative of the fault terminals related to the nodes on different time planes in different manners so that plural list of plural kinds of fault are drawn up without repeating the time-consuming presumption.
REFERENCES:
patent: 6170078 (2001-01-01), Erle et al.
patent: 6370492 (2002-04-01), Akin
patent: 2655105 (1997-05-01), None
patent: 2921502 (1999-04-01), None
Bowers Brandon
NEC Electronics Corporation
Siek Vuthe
Whitham Curtis & Christofferson, P.C.
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